1 /*
2  * (C) Copyright 2016 Broadcom Ltd.
3  *
4  * SPDX-License-Identifier:	GPL-2.0+
5  */
6 #include <common.h>
7 #include <asm/system.h>
8 #include <asm/armv8/mmu.h>
9 
10 static struct mm_region ns2_mem_map[] = {
11 	{
12 		.virt = 0x0UL,
13 		.phys = 0x0UL,
14 		.size = 0x80000000UL,
15 		.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
16 			 PTE_BLOCK_NON_SHARE |
17 			 PTE_BLOCK_PXN | PTE_BLOCK_UXN
18 	}, {
19 		.virt = 0x80000000UL,
20 		.phys = 0x80000000UL,
21 		.size = 0xff80000000UL,
22 		.attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
23 			 PTE_BLOCK_INNER_SHARE
24 	}, {
25 		/* List terminator */
26 		0,
27 	}
28 };
29 
30 struct mm_region *mem_map = ns2_mem_map;
31 
32 DECLARE_GLOBAL_DATA_PTR;
33 
34 int board_init(void)
35 {
36 	return 0;
37 }
38 
39 int dram_init(void)
40 {
41 	gd->ram_size = get_ram_size((long *)CONFIG_SYS_SDRAM_BASE,
42 				    PHYS_SDRAM_1_SIZE + PHYS_SDRAM_2_SIZE);
43 	return 0;
44 }
45 
46 void dram_init_banksize(void)
47 {
48 	gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
49 	gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
50 
51 	gd->bd->bi_dram[1].start = CONFIG_SYS_SDRAM_BASE + PHYS_SDRAM_1_SIZE;
52 	gd->bd->bi_dram[1].size = PHYS_SDRAM_2_SIZE;
53 }
54 
55 void reset_cpu(ulong addr)
56 {
57 	psci_system_reset();
58 }
59