1*9ed679aeSDarwin Rambo /* 2*9ed679aeSDarwin Rambo * Copyright 2013 Broadcom Corporation. 3*9ed679aeSDarwin Rambo * 4*9ed679aeSDarwin Rambo * SPDX-License-Identifier: GPL-2.0+ 5*9ed679aeSDarwin Rambo */ 6*9ed679aeSDarwin Rambo 7*9ed679aeSDarwin Rambo #include <common.h> 8*9ed679aeSDarwin Rambo #include <asm/io.h> 9*9ed679aeSDarwin Rambo #include <asm/mach-types.h> 10*9ed679aeSDarwin Rambo #include <mmc.h> 11*9ed679aeSDarwin Rambo #include <asm/kona-common/kona_sdhci.h> 12*9ed679aeSDarwin Rambo #include <asm/kona-common/clk.h> 13*9ed679aeSDarwin Rambo #include <asm/arch/sysmap.h> 14*9ed679aeSDarwin Rambo 15*9ed679aeSDarwin Rambo #define SECWATCHDOG_SDOGCR_OFFSET 0x00000000 16*9ed679aeSDarwin Rambo #define SECWATCHDOG_SDOGCR_EN_SHIFT 27 17*9ed679aeSDarwin Rambo #define SECWATCHDOG_SDOGCR_SRSTEN_SHIFT 26 18*9ed679aeSDarwin Rambo #define SECWATCHDOG_SDOGCR_CLKS_SHIFT 20 19*9ed679aeSDarwin Rambo #define SECWATCHDOG_SDOGCR_LD_SHIFT 0 20*9ed679aeSDarwin Rambo 21*9ed679aeSDarwin Rambo DECLARE_GLOBAL_DATA_PTR; 22*9ed679aeSDarwin Rambo 23*9ed679aeSDarwin Rambo /* 24*9ed679aeSDarwin Rambo * board_init - early hardware init 25*9ed679aeSDarwin Rambo */ 26*9ed679aeSDarwin Rambo int board_init(void) 27*9ed679aeSDarwin Rambo { 28*9ed679aeSDarwin Rambo printf("Relocation Offset is: %08lx\n", gd->reloc_off); 29*9ed679aeSDarwin Rambo 30*9ed679aeSDarwin Rambo /* adress of boot parameters */ 31*9ed679aeSDarwin Rambo gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100; 32*9ed679aeSDarwin Rambo 33*9ed679aeSDarwin Rambo clk_init(); 34*9ed679aeSDarwin Rambo 35*9ed679aeSDarwin Rambo return 0; 36*9ed679aeSDarwin Rambo } 37*9ed679aeSDarwin Rambo 38*9ed679aeSDarwin Rambo /* 39*9ed679aeSDarwin Rambo * misc_init_r - miscellaneous platform dependent initializations 40*9ed679aeSDarwin Rambo */ 41*9ed679aeSDarwin Rambo int misc_init_r(void) 42*9ed679aeSDarwin Rambo { 43*9ed679aeSDarwin Rambo /* Disable watchdog reset - watchdog unused */ 44*9ed679aeSDarwin Rambo writel((0 << SECWATCHDOG_SDOGCR_EN_SHIFT) | 45*9ed679aeSDarwin Rambo (0 << SECWATCHDOG_SDOGCR_SRSTEN_SHIFT) | 46*9ed679aeSDarwin Rambo (4 << SECWATCHDOG_SDOGCR_CLKS_SHIFT) | 47*9ed679aeSDarwin Rambo (0x5a0 << SECWATCHDOG_SDOGCR_LD_SHIFT), 48*9ed679aeSDarwin Rambo (SECWD_BASE_ADDR + SECWATCHDOG_SDOGCR_OFFSET)); 49*9ed679aeSDarwin Rambo 50*9ed679aeSDarwin Rambo return 0; 51*9ed679aeSDarwin Rambo } 52*9ed679aeSDarwin Rambo 53*9ed679aeSDarwin Rambo /* 54*9ed679aeSDarwin Rambo * dram_init - sets uboots idea of sdram size 55*9ed679aeSDarwin Rambo */ 56*9ed679aeSDarwin Rambo int dram_init(void) 57*9ed679aeSDarwin Rambo { 58*9ed679aeSDarwin Rambo gd->ram_size = get_ram_size((long *)CONFIG_SYS_SDRAM_BASE, 59*9ed679aeSDarwin Rambo CONFIG_SYS_SDRAM_SIZE); 60*9ed679aeSDarwin Rambo return 0; 61*9ed679aeSDarwin Rambo } 62*9ed679aeSDarwin Rambo 63*9ed679aeSDarwin Rambo /* This is called after dram_init() so use get_ram_size result */ 64*9ed679aeSDarwin Rambo void dram_init_banksize(void) 65*9ed679aeSDarwin Rambo { 66*9ed679aeSDarwin Rambo gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE; 67*9ed679aeSDarwin Rambo gd->bd->bi_dram[0].size = gd->ram_size; 68*9ed679aeSDarwin Rambo } 69*9ed679aeSDarwin Rambo 70*9ed679aeSDarwin Rambo #ifdef CONFIG_KONA_SDHCI 71*9ed679aeSDarwin Rambo /* 72*9ed679aeSDarwin Rambo * mmc_init - Initializes mmc 73*9ed679aeSDarwin Rambo */ 74*9ed679aeSDarwin Rambo int board_mmc_init(bd_t *bis) 75*9ed679aeSDarwin Rambo { 76*9ed679aeSDarwin Rambo int ret = 0; 77*9ed679aeSDarwin Rambo 78*9ed679aeSDarwin Rambo /* Register eMMC - SDIO2 */ 79*9ed679aeSDarwin Rambo ret = kona_sdhci_init(1, 400000, 0); 80*9ed679aeSDarwin Rambo if (ret) 81*9ed679aeSDarwin Rambo return ret; 82*9ed679aeSDarwin Rambo 83*9ed679aeSDarwin Rambo /* Register SD Card - SDIO4 kona_mmc_init assumes 0 based index */ 84*9ed679aeSDarwin Rambo ret = kona_sdhci_init(3, 400000, 0); 85*9ed679aeSDarwin Rambo return ret; 86*9ed679aeSDarwin Rambo } 87*9ed679aeSDarwin Rambo #endif 88