1 /* 2 * Bluewater Systems Snapper 9260/9G20 modules 3 * 4 * (C) Copyright 2011 Bluewater Systems 5 * Author: Andre Renaud <andre@bluewatersys.com> 6 * Author: Ryan Mallon <ryan@bluewatersys.com> 7 * 8 * This program is free software; you can redistribute it and/or 9 * modify it under the terms of the GNU General Public License as 10 * published by the Free Software Foundation; either version 2 of 11 * the License, or (at your option) any later version. 12 * 13 * This program is distributed in the hope that it will be useful, 14 * but WITHOUT ANY WARRANTY; without even the implied warranty of 15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16 * GNU General Public License for more details. 17 * 18 * You should have received a copy of the GNU General Public License 19 * along with this program; if not, write to the Free Software 20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 21 * MA 02111-1307 USA 22 */ 23 24 #include <common.h> 25 #include <asm/io.h> 26 #include <asm/arch/at91sam9260_matrix.h> 27 #include <asm/arch/at91sam9_smc.h> 28 #include <asm/arch/at91_common.h> 29 #include <asm/arch/at91_pmc.h> 30 #include <asm/arch/at91_rstc.h> 31 #include <asm/arch/gpio.h> 32 #include <net.h> 33 #include <netdev.h> 34 #include <i2c.h> 35 #include <pca953x.h> 36 37 DECLARE_GLOBAL_DATA_PTR; 38 39 /* IO Expander pins */ 40 #define IO_EXP_ETH_RESET (0 << 1) 41 #define IO_EXP_ETH_POWER (1 << 1) 42 43 static void macb_hw_init(void) 44 { 45 struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC; 46 struct at91_port *pioa = (struct at91_port *)ATMEL_BASE_PIOA; 47 struct at91_rstc *rstc = (struct at91_rstc *)ATMEL_BASE_RSTC; 48 unsigned long erstl; 49 50 /* Enable clock */ 51 writel(1 << ATMEL_ID_EMAC0, &pmc->pcer); 52 53 /* Disable pull-ups to prevent PHY going into test mode */ 54 writel(pin_to_mask(AT91_PIN_PA14) | 55 pin_to_mask(AT91_PIN_PA15) | 56 pin_to_mask(AT91_PIN_PA18), 57 &pioa->pudr); 58 59 /* Power down ethernet */ 60 pca953x_set_dir(0x28, IO_EXP_ETH_POWER, PCA953X_DIR_OUT); 61 pca953x_set_val(0x28, IO_EXP_ETH_POWER, 1); 62 63 /* Hold ethernet in reset */ 64 pca953x_set_dir(0x28, IO_EXP_ETH_RESET, PCA953X_DIR_OUT); 65 pca953x_set_val(0x28, IO_EXP_ETH_RESET, 0); 66 67 /* Enable ethernet power */ 68 pca953x_set_val(0x28, IO_EXP_ETH_POWER, 0); 69 70 /* Need to reset PHY -> 500ms reset */ 71 erstl = readl(&rstc->mr) & AT91_RSTC_MR_ERSTL_MASK; 72 writel(AT91_RSTC_KEY | AT91_RSTC_MR_ERSTL(13) | 73 AT91_RSTC_MR_URSTEN, &rstc->mr); 74 writel(AT91_RSTC_KEY | AT91_RSTC_CR_EXTRST, &rstc->cr); 75 76 /* Wait for end hardware reset */ 77 while (!(readl(&rstc->sr) & AT91_RSTC_SR_NRSTL)) 78 ; 79 80 /* Restore NRST value */ 81 writel(AT91_RSTC_KEY | erstl | AT91_RSTC_MR_URSTEN, &rstc->mr); 82 83 /* Bring the ethernet out of reset */ 84 pca953x_set_val(0x28, IO_EXP_ETH_RESET, 1); 85 86 /* The phy internal reset take 21ms */ 87 udelay(21 * 1000); 88 89 /* Re-enable pull-up */ 90 writel(pin_to_mask(AT91_PIN_PA14) | 91 pin_to_mask(AT91_PIN_PA15) | 92 pin_to_mask(AT91_PIN_PA18), 93 &pioa->puer); 94 95 at91_macb_hw_init(); 96 } 97 98 static void nand_hw_init(void) 99 { 100 struct at91_smc *smc = (struct at91_smc *)ATMEL_BASE_SMC; 101 struct at91_matrix *matrix = (struct at91_matrix *)ATMEL_BASE_MATRIX; 102 unsigned long csa; 103 104 /* Enable CS3 as NAND/SmartMedia */ 105 csa = readl(&matrix->ebicsa); 106 csa |= AT91_MATRIX_CS3A_SMC_SMARTMEDIA; 107 writel(csa, &matrix->ebicsa); 108 109 /* Configure SMC CS3 for NAND/SmartMedia */ 110 writel(AT91_SMC_SETUP_NWE(2) | AT91_SMC_SETUP_NCS_WR(0) | 111 AT91_SMC_SETUP_NRD(2) | AT91_SMC_SETUP_NCS_RD(0), 112 &smc->cs[3].setup); 113 writel(AT91_SMC_PULSE_NWE(4) | AT91_SMC_PULSE_NCS_WR(4) | 114 AT91_SMC_PULSE_NRD(4) | AT91_SMC_PULSE_NCS_RD(4), 115 &smc->cs[3].pulse); 116 writel(AT91_SMC_CYCLE_NWE(7) | AT91_SMC_CYCLE_NRD(7), 117 &smc->cs[3].cycle); 118 writel(AT91_SMC_MODE_RM_NRD | AT91_SMC_MODE_WM_NWE | 119 AT91_SMC_MODE_EXNW_DISABLE | 120 AT91_SMC_MODE_DBW_8 | 121 AT91_SMC_MODE_TDF_CYCLE(3), 122 &smc->cs[3].mode); 123 124 /* Configure RDY/BSY */ 125 at91_set_gpio_input(CONFIG_SYS_NAND_READY_PIN, 1); 126 127 /* Enable NandFlash */ 128 at91_set_gpio_output(CONFIG_SYS_NAND_ENABLE_PIN, 1); 129 } 130 131 int board_init(void) 132 { 133 struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC; 134 135 /* Enable PIO clocks */ 136 writel((1 << ATMEL_ID_PIOA) | 137 (1 << ATMEL_ID_PIOB) | 138 (1 << ATMEL_ID_PIOC), &pmc->pcer); 139 140 /* The mach-type is the same for both Snapper 9260 and 9G20 */ 141 gd->bd->bi_arch_number = MACH_TYPE_SNAPPER_9260; 142 143 /* Address of boot parameters */ 144 gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100; 145 146 /* Initialise peripherals */ 147 at91_seriald_hw_init(); 148 i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); 149 nand_hw_init(); 150 macb_hw_init(); 151 152 return 0; 153 } 154 155 int board_eth_init(bd_t *bis) 156 { 157 return macb_eth_initialize(0, (void *)ATMEL_BASE_EMAC0, 0x1f); 158 } 159 160 int dram_init(void) 161 { 162 gd->ram_size = get_ram_size((void *)CONFIG_SYS_SDRAM_BASE, 163 CONFIG_SYS_SDRAM_SIZE); 164 return 0; 165 } 166 167 void reset_phy(void) 168 { 169 } 170