1*83d290c5STom Rini // SPDX-License-Identifier: GPL-2.0+
2b8d41ddaSRyan Mallon /*
3b8d41ddaSRyan Mallon  * Bluewater Systems Snapper 9260/9G20 modules
4b8d41ddaSRyan Mallon  *
5b8d41ddaSRyan Mallon  * (C) Copyright 2011 Bluewater Systems
6b8d41ddaSRyan Mallon  *   Author: Andre Renaud <andre@bluewatersys.com>
7b8d41ddaSRyan Mallon  *   Author: Ryan Mallon <ryan@bluewatersys.com>
8b8d41ddaSRyan Mallon  */
9b8d41ddaSRyan Mallon 
10b8d41ddaSRyan Mallon #include <common.h>
111a1927f3SSimon Glass #include <dm.h>
12b8d41ddaSRyan Mallon #include <asm/io.h>
131a1927f3SSimon Glass #include <asm/gpio.h>
14c62db35dSSimon Glass #include <asm/mach-types.h>
15b8d41ddaSRyan Mallon #include <asm/arch/at91sam9260_matrix.h>
16b8d41ddaSRyan Mallon #include <asm/arch/at91sam9_smc.h>
17b8d41ddaSRyan Mallon #include <asm/arch/at91_common.h>
1870341e2eSWenyou Yang #include <asm/arch/clk.h>
19b8d41ddaSRyan Mallon #include <asm/arch/gpio.h>
201a1927f3SSimon Glass #include <asm/arch/atmel_serial.h>
21b8d41ddaSRyan Mallon #include <net.h>
22b8d41ddaSRyan Mallon #include <netdev.h>
23b8d41ddaSRyan Mallon #include <i2c.h>
24b8d41ddaSRyan Mallon #include <pca953x.h>
25b8d41ddaSRyan Mallon 
26b8d41ddaSRyan Mallon DECLARE_GLOBAL_DATA_PTR;
27b8d41ddaSRyan Mallon 
28b8d41ddaSRyan Mallon /* IO Expander pins */
29b8d41ddaSRyan Mallon #define IO_EXP_ETH_RESET	(0 << 1)
30b8d41ddaSRyan Mallon #define IO_EXP_ETH_POWER	(1 << 1)
31b8d41ddaSRyan Mallon 
macb_hw_init(void)32b8d41ddaSRyan Mallon static void macb_hw_init(void)
33b8d41ddaSRyan Mallon {
34b8d41ddaSRyan Mallon 	struct at91_port *pioa = (struct at91_port *)ATMEL_BASE_PIOA;
35b8d41ddaSRyan Mallon 
3670341e2eSWenyou Yang 	at91_periph_clk_enable(ATMEL_ID_EMAC0);
37b8d41ddaSRyan Mallon 
38b8d41ddaSRyan Mallon 	/* Disable pull-ups to prevent PHY going into test mode */
39b8d41ddaSRyan Mallon 	writel(pin_to_mask(AT91_PIN_PA14) |
40b8d41ddaSRyan Mallon 	       pin_to_mask(AT91_PIN_PA15) |
41b8d41ddaSRyan Mallon 	       pin_to_mask(AT91_PIN_PA18),
42b8d41ddaSRyan Mallon 	       &pioa->pudr);
43b8d41ddaSRyan Mallon 
44b8d41ddaSRyan Mallon 	/* Power down ethernet */
45b8d41ddaSRyan Mallon 	pca953x_set_dir(0x28, IO_EXP_ETH_POWER, PCA953X_DIR_OUT);
46b8d41ddaSRyan Mallon 	pca953x_set_val(0x28, IO_EXP_ETH_POWER, 1);
47b8d41ddaSRyan Mallon 
48b8d41ddaSRyan Mallon 	/* Hold ethernet in reset */
49b8d41ddaSRyan Mallon 	pca953x_set_dir(0x28, IO_EXP_ETH_RESET, PCA953X_DIR_OUT);
50b8d41ddaSRyan Mallon 	pca953x_set_val(0x28, IO_EXP_ETH_RESET, 0);
51b8d41ddaSRyan Mallon 
52b8d41ddaSRyan Mallon 	/* Enable ethernet power */
53b8d41ddaSRyan Mallon 	pca953x_set_val(0x28, IO_EXP_ETH_POWER, 0);
54b8d41ddaSRyan Mallon 
554535a24cSHeiko Schocher 	at91_phy_reset();
56b8d41ddaSRyan Mallon 
57b8d41ddaSRyan Mallon 	/* Bring the ethernet out of reset */
58b8d41ddaSRyan Mallon 	pca953x_set_val(0x28, IO_EXP_ETH_RESET, 1);
59b8d41ddaSRyan Mallon 
60b8d41ddaSRyan Mallon 	/* The phy internal reset take 21ms */
61b8d41ddaSRyan Mallon 	udelay(21 * 1000);
62b8d41ddaSRyan Mallon 
63b8d41ddaSRyan Mallon 	/* Re-enable pull-up */
64b8d41ddaSRyan Mallon 	writel(pin_to_mask(AT91_PIN_PA14) |
65b8d41ddaSRyan Mallon 	       pin_to_mask(AT91_PIN_PA15) |
66b8d41ddaSRyan Mallon 	       pin_to_mask(AT91_PIN_PA18),
67b8d41ddaSRyan Mallon 	       &pioa->puer);
68b8d41ddaSRyan Mallon 
69b8d41ddaSRyan Mallon 	at91_macb_hw_init();
70b8d41ddaSRyan Mallon }
71b8d41ddaSRyan Mallon 
nand_hw_init(void)72b8d41ddaSRyan Mallon static void nand_hw_init(void)
73b8d41ddaSRyan Mallon {
74b8d41ddaSRyan Mallon 	struct at91_smc *smc       = (struct at91_smc    *)ATMEL_BASE_SMC;
75b8d41ddaSRyan Mallon 	struct at91_matrix *matrix = (struct at91_matrix *)ATMEL_BASE_MATRIX;
76b8d41ddaSRyan Mallon 	unsigned long csa;
77b8d41ddaSRyan Mallon 
78b8d41ddaSRyan Mallon 	/* Enable CS3 as NAND/SmartMedia */
79b8d41ddaSRyan Mallon 	csa = readl(&matrix->ebicsa);
80b8d41ddaSRyan Mallon 	csa |= AT91_MATRIX_CS3A_SMC_SMARTMEDIA;
81b8d41ddaSRyan Mallon 	writel(csa, &matrix->ebicsa);
82b8d41ddaSRyan Mallon 
83b8d41ddaSRyan Mallon 	/* Configure SMC CS3 for NAND/SmartMedia */
84b8d41ddaSRyan Mallon 	writel(AT91_SMC_SETUP_NWE(2) | AT91_SMC_SETUP_NCS_WR(0) |
85b8d41ddaSRyan Mallon 	       AT91_SMC_SETUP_NRD(2) | AT91_SMC_SETUP_NCS_RD(0),
86b8d41ddaSRyan Mallon 	       &smc->cs[3].setup);
87b8d41ddaSRyan Mallon 	writel(AT91_SMC_PULSE_NWE(4) | AT91_SMC_PULSE_NCS_WR(4) |
88b8d41ddaSRyan Mallon 	       AT91_SMC_PULSE_NRD(4) | AT91_SMC_PULSE_NCS_RD(4),
89b8d41ddaSRyan Mallon 	       &smc->cs[3].pulse);
90b8d41ddaSRyan Mallon 	writel(AT91_SMC_CYCLE_NWE(7) | AT91_SMC_CYCLE_NRD(7),
91b8d41ddaSRyan Mallon 	       &smc->cs[3].cycle);
92b8d41ddaSRyan Mallon 	writel(AT91_SMC_MODE_RM_NRD | AT91_SMC_MODE_WM_NWE |
93b8d41ddaSRyan Mallon 	       AT91_SMC_MODE_EXNW_DISABLE |
94b8d41ddaSRyan Mallon 	       AT91_SMC_MODE_DBW_8 |
95b8d41ddaSRyan Mallon 	       AT91_SMC_MODE_TDF_CYCLE(3),
96b8d41ddaSRyan Mallon 	       &smc->cs[3].mode);
97b8d41ddaSRyan Mallon 
98b8d41ddaSRyan Mallon 	/* Configure RDY/BSY */
991a1927f3SSimon Glass 	gpio_request(CONFIG_SYS_NAND_READY_PIN, "nand_rdy");
1001a1927f3SSimon Glass 	gpio_direction_input(CONFIG_SYS_NAND_READY_PIN);
101b8d41ddaSRyan Mallon 
102b8d41ddaSRyan Mallon 	/* Enable NandFlash */
1031a1927f3SSimon Glass 	gpio_request(CONFIG_SYS_NAND_ENABLE_PIN, "nand_ce");
1041a1927f3SSimon Glass 	gpio_direction_output(CONFIG_SYS_NAND_ENABLE_PIN, 1);
105b8d41ddaSRyan Mallon }
106b8d41ddaSRyan Mallon 
board_init(void)107b8d41ddaSRyan Mallon int board_init(void)
108b8d41ddaSRyan Mallon {
10970341e2eSWenyou Yang 	at91_periph_clk_enable(ATMEL_ID_PIOA);
11070341e2eSWenyou Yang 	at91_periph_clk_enable(ATMEL_ID_PIOB);
11170341e2eSWenyou Yang 	at91_periph_clk_enable(ATMEL_ID_PIOC);
112b8d41ddaSRyan Mallon 
113b8d41ddaSRyan Mallon 	/* The mach-type is the same for both Snapper 9260 and 9G20 */
114b8d41ddaSRyan Mallon 	gd->bd->bi_arch_number = MACH_TYPE_SNAPPER_9260;
115b8d41ddaSRyan Mallon 
116b8d41ddaSRyan Mallon 	/* Address of boot parameters */
117b8d41ddaSRyan Mallon 	gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
118b8d41ddaSRyan Mallon 
119b8d41ddaSRyan Mallon 	/* Initialise peripherals */
120b8d41ddaSRyan Mallon 	at91_seriald_hw_init();
121ea818dbbSHeiko Schocher 	i2c_set_bus_num(0);
122b8d41ddaSRyan Mallon 	nand_hw_init();
123b8d41ddaSRyan Mallon 	macb_hw_init();
124b8d41ddaSRyan Mallon 
125b8d41ddaSRyan Mallon 	return 0;
126b8d41ddaSRyan Mallon }
127b8d41ddaSRyan Mallon 
board_eth_init(bd_t * bis)128b8d41ddaSRyan Mallon int board_eth_init(bd_t *bis)
129b8d41ddaSRyan Mallon {
130b8d41ddaSRyan Mallon 	return macb_eth_initialize(0, (void *)ATMEL_BASE_EMAC0, 0x1f);
131b8d41ddaSRyan Mallon }
132b8d41ddaSRyan Mallon 
dram_init(void)133b8d41ddaSRyan Mallon int dram_init(void)
134b8d41ddaSRyan Mallon {
135b8d41ddaSRyan Mallon 	gd->ram_size = get_ram_size((void *)CONFIG_SYS_SDRAM_BASE,
136b8d41ddaSRyan Mallon 				    CONFIG_SYS_SDRAM_SIZE);
137b8d41ddaSRyan Mallon 	return 0;
138b8d41ddaSRyan Mallon }
139b8d41ddaSRyan Mallon 
reset_phy(void)140b8d41ddaSRyan Mallon void reset_phy(void)
141b8d41ddaSRyan Mallon {
142b8d41ddaSRyan Mallon }
1431a1927f3SSimon Glass 
1441a1927f3SSimon Glass static struct atmel_serial_platdata at91sam9260_serial_plat = {
1451a1927f3SSimon Glass 	.base_addr = ATMEL_BASE_DBGU,
1461a1927f3SSimon Glass };
1471a1927f3SSimon Glass 
1481a1927f3SSimon Glass U_BOOT_DEVICE(at91sam9260_serial) = {
1491a1927f3SSimon Glass 	.name	= "serial_atmel",
1501a1927f3SSimon Glass 	.platdata = &at91sam9260_serial_plat,
1511a1927f3SSimon Glass };
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