1 /* 2 * (C) Copyright 2007-2008 3 * Stelian Pop <stelian@popies.net> 4 * Lead Tech Design <www.leadtechdesign.com> 5 * 6 * See file CREDITS for list of people who contributed to this 7 * project. 8 * 9 * This program is free software; you can redistribute it and/or 10 * modify it under the terms of the GNU General Public License as 11 * published by the Free Software Foundation; either version 2 of 12 * the License, or (at your option) any later version. 13 * 14 * This program is distributed in the hope that it will be useful, 15 * but WITHOUT ANY WARRANTY; without even the implied warranty of 16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17 * GNU General Public License for more details. 18 * 19 * You should have received a copy of the GNU General Public License 20 * along with this program; if not, write to the Free Software 21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 22 * MA 02111-1307 USA 23 */ 24 25 #include <common.h> 26 #include <asm/io.h> 27 #include <asm/arch/at91sam9260_matrix.h> 28 #include <asm/arch/at91sam9_smc.h> 29 #include <asm/arch/at91_common.h> 30 #include <asm/arch/at91_pmc.h> 31 #include <asm/arch/at91_rstc.h> 32 #include <asm/arch/gpio.h> 33 #include <atmel_mci.h> 34 35 #if defined(CONFIG_RESET_PHY_R) && defined(CONFIG_MACB) 36 # include <net.h> 37 #endif 38 #include <netdev.h> 39 40 DECLARE_GLOBAL_DATA_PTR; 41 42 /* ------------------------------------------------------------------------- */ 43 /* 44 * Miscelaneous platform dependent initialisations 45 */ 46 47 #ifdef CONFIG_CMD_NAND 48 static void at91sam9260ek_nand_hw_init(void) 49 { 50 struct at91_smc *smc = (struct at91_smc *)ATMEL_BASE_SMC; 51 struct at91_matrix *matrix = (struct at91_matrix *)ATMEL_BASE_MATRIX; 52 unsigned long csa; 53 54 /* Assign CS3 to NAND/SmartMedia Interface */ 55 csa = readl(&matrix->ebicsa); 56 csa |= AT91_MATRIX_CS3A_SMC_SMARTMEDIA; 57 writel(csa, &matrix->ebicsa); 58 59 /* Configure SMC CS3 for NAND/SmartMedia */ 60 writel(AT91_SMC_SETUP_NWE(1) | AT91_SMC_SETUP_NCS_WR(0) | 61 AT91_SMC_SETUP_NRD(1) | AT91_SMC_SETUP_NCS_RD(0), 62 &smc->cs[3].setup); 63 writel(AT91_SMC_PULSE_NWE(3) | AT91_SMC_PULSE_NCS_WR(3) | 64 AT91_SMC_PULSE_NRD(3) | AT91_SMC_PULSE_NCS_RD(3), 65 &smc->cs[3].pulse); 66 writel(AT91_SMC_CYCLE_NWE(5) | AT91_SMC_CYCLE_NRD(5), 67 &smc->cs[3].cycle); 68 writel(AT91_SMC_MODE_RM_NRD | AT91_SMC_MODE_WM_NWE | 69 AT91_SMC_MODE_EXNW_DISABLE | 70 #ifdef CONFIG_SYS_NAND_DBW_16 71 AT91_SMC_MODE_DBW_16 | 72 #else /* CONFIG_SYS_NAND_DBW_8 */ 73 AT91_SMC_MODE_DBW_8 | 74 #endif 75 AT91_SMC_MODE_TDF_CYCLE(2), 76 &smc->cs[3].mode); 77 78 /* Configure RDY/BSY */ 79 at91_set_gpio_input(CONFIG_SYS_NAND_READY_PIN, 1); 80 81 /* Enable NandFlash */ 82 at91_set_gpio_output(CONFIG_SYS_NAND_ENABLE_PIN, 1); 83 84 } 85 #endif 86 87 #ifdef CONFIG_MACB 88 static void at91sam9260ek_macb_hw_init(void) 89 { 90 struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC; 91 struct at91_port *pioa = (struct at91_port *)ATMEL_BASE_PIOA; 92 struct at91_rstc *rstc = (struct at91_rstc *)ATMEL_BASE_RSTC; 93 unsigned long erstl; 94 95 /* Enable EMAC clock */ 96 writel(1 << ATMEL_ID_EMAC0, &pmc->pcer); 97 98 /* 99 * Disable pull-up on: 100 * RXDV (PA17) => PHY normal mode (not Test mode) 101 * ERX0 (PA14) => PHY ADDR0 102 * ERX1 (PA15) => PHY ADDR1 103 * ERX2 (PA25) => PHY ADDR2 104 * ERX3 (PA26) => PHY ADDR3 105 * ECRS (PA28) => PHY ADDR4 => PHYADDR = 0x0 106 * 107 * PHY has internal pull-down 108 */ 109 writel(pin_to_mask(AT91_PIN_PA14) | 110 pin_to_mask(AT91_PIN_PA15) | 111 pin_to_mask(AT91_PIN_PA17) | 112 pin_to_mask(AT91_PIN_PA25) | 113 pin_to_mask(AT91_PIN_PA26) | 114 pin_to_mask(AT91_PIN_PA28), 115 &pioa->pudr); 116 117 erstl = readl(&rstc->mr) & AT91_RSTC_MR_ERSTL_MASK; 118 119 /* Need to reset PHY -> 500ms reset */ 120 writel(AT91_RSTC_KEY | AT91_RSTC_MR_ERSTL(13) | 121 AT91_RSTC_MR_URSTEN, &rstc->mr); 122 123 writel(AT91_RSTC_KEY | AT91_RSTC_CR_EXTRST, &rstc->cr); 124 125 /* Wait for end hardware reset */ 126 while (!(readl(&rstc->sr) & AT91_RSTC_SR_NRSTL)) 127 ; 128 129 /* Restore NRST value */ 130 writel(AT91_RSTC_KEY | erstl | AT91_RSTC_MR_URSTEN, 131 &rstc->mr); 132 133 /* Re-enable pull-up */ 134 writel(pin_to_mask(AT91_PIN_PA14) | 135 pin_to_mask(AT91_PIN_PA15) | 136 pin_to_mask(AT91_PIN_PA17) | 137 pin_to_mask(AT91_PIN_PA25) | 138 pin_to_mask(AT91_PIN_PA26) | 139 pin_to_mask(AT91_PIN_PA28), 140 &pioa->puer); 141 142 /* Initialize EMAC=MACB hardware */ 143 at91_macb_hw_init(); 144 } 145 #endif 146 147 #ifdef CONFIG_GENERIC_ATMEL_MCI 148 int board_mmc_init(bd_t *bd) 149 { 150 at91_mci_hw_init(); 151 152 return atmel_mci_init((void *)ATMEL_BASE_MCI); 153 } 154 #endif 155 156 int board_early_init_f(void) 157 { 158 struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC; 159 160 /* Enable clocks for all PIOs */ 161 writel((1 << ATMEL_ID_PIOA) | (1 << ATMEL_ID_PIOB) | 162 (1 << ATMEL_ID_PIOC), 163 &pmc->pcer); 164 165 return 0; 166 } 167 168 int board_init(void) 169 { 170 /* adress of boot parameters */ 171 gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100; 172 173 at91_seriald_hw_init(); 174 #ifdef CONFIG_CMD_NAND 175 at91sam9260ek_nand_hw_init(); 176 #endif 177 #ifdef CONFIG_HAS_DATAFLASH 178 at91_spi0_hw_init((1 << 0) | (1 << 1)); 179 #endif 180 #ifdef CONFIG_MACB 181 at91sam9260ek_macb_hw_init(); 182 #endif 183 184 return 0; 185 } 186 187 int dram_init(void) 188 { 189 gd->ram_size = get_ram_size( 190 (void *)CONFIG_SYS_SDRAM_BASE, 191 CONFIG_SYS_SDRAM_SIZE); 192 return 0; 193 } 194 195 #ifdef CONFIG_RESET_PHY_R 196 void reset_phy(void) 197 { 198 } 199 #endif 200 201 int board_eth_init(bd_t *bis) 202 { 203 int rc = 0; 204 #ifdef CONFIG_MACB 205 rc = macb_eth_initialize(0, (void *)ATMEL_BASE_EMAC0, 0x00); 206 #endif 207 return rc; 208 } 209