1 /*
2  * (C) Copyright 2013
3  * David Feng <fenghua@phytium.com.cn>
4  * Sharma Bhupesh <bhupesh.sharma@freescale.com>
5  *
6  * SPDX-License-Identifier:	GPL-2.0+
7  */
8 #include <common.h>
9 #include <malloc.h>
10 #include <errno.h>
11 #include <netdev.h>
12 #include <asm/io.h>
13 #include <linux/compiler.h>
14 #include <dm/platdata.h>
15 #include <dm/platform_data/serial_pl01x.h>
16 #include "pcie.h"
17 
18 DECLARE_GLOBAL_DATA_PTR;
19 
20 static const struct pl01x_serial_platdata serial_platdata = {
21 	.base = V2M_UART0,
22 	.type = TYPE_PL011,
23 	.clock = CONFIG_PL011_CLOCK,
24 };
25 
26 U_BOOT_DEVICE(vexpress_serials) = {
27 	.name = "serial_pl01x",
28 	.platdata = &serial_platdata,
29 };
30 
31 /* This function gets replaced by platforms supporting PCIe.
32  * The replacement function, eg. on Juno, initialises the PCIe bus.
33  */
34 __weak void vexpress64_pcie_init(void)
35 {
36 }
37 
38 int board_init(void)
39 {
40 	vexpress64_pcie_init();
41 	return 0;
42 }
43 
44 int dram_init(void)
45 {
46 	gd->ram_size = PHYS_SDRAM_1_SIZE;
47 	return 0;
48 }
49 
50 void dram_init_banksize(void)
51 {
52 	gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
53 	gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
54 #ifdef PHYS_SDRAM_2
55 	gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
56 	gd->bd->bi_dram[1].size = PHYS_SDRAM_2_SIZE;
57 #endif
58 }
59 
60 /*
61  * Board specific reset that is system reset.
62  */
63 void reset_cpu(ulong addr)
64 {
65 }
66 
67 /*
68  * Board specific ethernet initialization routine.
69  */
70 int board_eth_init(bd_t *bis)
71 {
72 	int rc = 0;
73 #ifdef CONFIG_SMC91111
74 	rc = smc91111_initialize(0, CONFIG_SMC91111_BASE);
75 #endif
76 #ifdef CONFIG_SMC911X
77 	rc = smc911x_initialize(0, CONFIG_SMC911X_BASE);
78 #endif
79 	return rc;
80 }
81