1 /*
2  * (C) Copyright 2002
3  * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
4  * Marius Groeger <mgroeger@sysgo.de>
5  *
6  * (C) Copyright 2002
7  * David Mueller, ELSOFT AG, <d.mueller@elsoft.ch>
8  *
9  * (C) Copyright 2003
10  * Texas Instruments, <www.ti.com>
11  * Kshitij Gupta <Kshitij@ti.com>
12  *
13  * (C) Copyright 2004
14  * ARM Ltd.
15  * Philippe Robin, <philippe.robin@arm.com>
16  *
17  * See file CREDITS for list of people who contributed to this
18  * project.
19  *
20  * This program is free software; you can redistribute it and/or
21  * modify it under the terms of the GNU General Public License as
22  * published by the Free Software Foundation; either version 2 of
23  * the License, or (at your option) any later version.
24  *
25  * This program is distributed in the hope that it will be useful,
26  * but WITHOUT ANY WARRANTY; without even the implied warranty of
27  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
28  * GNU General Public License for more details.
29  *
30  * You should have received a copy of the GNU General Public License
31  * along with this program; if not, write to the Free Software
32  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
33  * MA 02111-1307 USA
34  */
35 #include <common.h>
36 #include <malloc.h>
37 #include <errno.h>
38 #include <netdev.h>
39 #include <asm/io.h>
40 #include <asm/arch/systimer.h>
41 #include <asm/arch/sysctrl.h>
42 #include <asm/arch/wdt.h>
43 #include "../drivers/mmc/arm_pl180_mmci.h"
44 
45 static ulong timestamp;
46 static ulong lastdec;
47 
48 static struct systimer *systimer_base = (struct systimer *)V2M_TIMER01;
49 static struct sysctrl *sysctrl_base = (struct sysctrl *)SCTL_BASE;
50 
51 static void flash__init(void);
52 static void vexpress_timer_init(void);
53 DECLARE_GLOBAL_DATA_PTR;
54 
55 #if defined(CONFIG_SHOW_BOOT_PROGRESS)
56 void show_boot_progress(int progress)
57 {
58 	printf("Boot reached stage %d\n", progress);
59 }
60 #endif
61 
62 static inline void delay(ulong loops)
63 {
64 	__asm__ volatile ("1:\n"
65 		"subs %0, %1, #1\n"
66 		"bne 1b" : "=r" (loops) : "0" (loops));
67 }
68 
69 int board_init(void)
70 {
71 	gd->bd->bi_boot_params = LINUX_BOOT_PARAM_ADDR;
72 	gd->bd->bi_arch_number = MACH_TYPE_VEXPRESS;
73 	gd->flags = 0;
74 
75 	icache_enable();
76 	flash__init();
77 	vexpress_timer_init();
78 
79 	return 0;
80 }
81 
82 int board_eth_init(bd_t *bis)
83 {
84 	int rc = 0;
85 #ifdef CONFIG_SMC911X
86 	rc = smc911x_initialize(0, CONFIG_SMC911X_BASE);
87 #endif
88 	return rc;
89 }
90 
91 int cpu_mmc_init(bd_t *bis)
92 {
93 	int rc = 0;
94 	(void) bis;
95 #ifdef CONFIG_ARM_PL180_MMCI
96 	struct pl180_mmc_host *host;
97 
98 	host = malloc(sizeof(struct pl180_mmc_host));
99 	if (!host)
100 		return -ENOMEM;
101 	memset(host, 0, sizeof(*host));
102 
103 	strcpy(host->name, "MMC");
104 	host->base = (struct sdi_registers *)CONFIG_ARM_PL180_MMCI_BASE;
105 	host->pwr_init = INIT_PWR;
106 	host->clkdiv_init = SDI_CLKCR_CLKDIV_INIT_V1 | SDI_CLKCR_CLKEN;
107 	host->voltages = VOLTAGE_WINDOW_MMC;
108 	host->caps = 0;
109 	host->clock_in = ARM_MCLK;
110 	host->clock_min = ARM_MCLK / (2 * (SDI_CLKCR_CLKDIV_INIT_V1 + 1));
111 	host->clock_max = CONFIG_ARM_PL180_MMCI_CLOCK_FREQ;
112 	rc = arm_pl180_mmci_init(host);
113 #endif
114 	return rc;
115 }
116 
117 static void flash__init(void)
118 {
119 	/* Setup the sytem control register to allow writing to flash */
120 	writel(readl(&sysctrl_base->scflashctrl) | VEXPRESS_FLASHPROG_FLVPPEN,
121 	       &sysctrl_base->scflashctrl);
122 }
123 
124 int dram_init(void)
125 {
126 	gd->ram_size =
127 		get_ram_size((long *)CONFIG_SYS_SDRAM_BASE, PHYS_SDRAM_1_SIZE);
128 	return 0;
129 }
130 
131 void dram_init_banksize(void)
132 {
133 	gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
134 	gd->bd->bi_dram[0].size =
135 			get_ram_size((long *)PHYS_SDRAM_1, PHYS_SDRAM_1_SIZE);
136 	gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
137 	gd->bd->bi_dram[1].size =
138 			get_ram_size((long *)PHYS_SDRAM_2, PHYS_SDRAM_2_SIZE);
139 }
140 
141 int timer_init(void)
142 {
143 	return 0;
144 }
145 
146 /*
147  * Start timer:
148  *    Setup a 32 bit timer, running at 1KHz
149  *    Versatile Express Motherboard provides 1 MHz timer
150  */
151 static void vexpress_timer_init(void)
152 {
153 	/*
154 	 * Set clock frequency in system controller:
155 	 *   VEXPRESS_REFCLK is 32KHz
156 	 *   VEXPRESS_TIMCLK is 1MHz
157 	 */
158 	writel(SP810_TIMER0_ENSEL | SP810_TIMER1_ENSEL |
159 	       SP810_TIMER2_ENSEL | SP810_TIMER3_ENSEL |
160 	       readl(&sysctrl_base->scctrl), &sysctrl_base->scctrl);
161 
162 	/*
163 	 * Set Timer0 to be:
164 	 *   Enabled, free running, no interrupt, 32-bit, wrapping
165 	 */
166 	writel(SYSTIMER_RELOAD, &systimer_base->timer0load);
167 	writel(SYSTIMER_RELOAD, &systimer_base->timer0value);
168 	writel(SYSTIMER_EN | SYSTIMER_32BIT |
169 	       readl(&systimer_base->timer0control),
170 	       &systimer_base->timer0control);
171 
172 	reset_timer_masked();
173 }
174 
175 int v2m_cfg_write(u32 devfn, u32 data)
176 {
177 	/* Configuration interface broken? */
178 	u32 val;
179 
180 	devfn |= SYS_CFG_START | SYS_CFG_WRITE;
181 
182 	val = readl(V2M_SYS_CFGSTAT);
183 	writel(val & ~SYS_CFG_COMPLETE, V2M_SYS_CFGSTAT);
184 
185 	writel(data, V2M_SYS_CFGDATA);
186 	writel(devfn, V2M_SYS_CFGCTRL);
187 
188 	do {
189 		val = readl(V2M_SYS_CFGSTAT);
190 	} while (val == 0);
191 
192 	return !!(val & SYS_CFG_ERR);
193 }
194 
195 /* Use the ARM Watchdog System to cause reset */
196 void reset_cpu(ulong addr)
197 {
198 	if (v2m_cfg_write(SYS_CFG_REBOOT | SYS_CFG_SITE_MB, 0))
199 		printf("Unable to reboot\n");
200 }
201 
202 /*
203  * Delay x useconds AND perserve advance timstamp value
204  *     assumes timer is ticking at 1 msec
205  */
206 void __udelay(ulong usec)
207 {
208 	ulong tmo, tmp;
209 
210 	tmo = usec / 1000;
211 	tmp = get_timer(0);	/* get current timestamp */
212 
213 	/*
214 	 * If setting this forward will roll time stamp	then
215 	 * reset "advancing" timestamp to 0 and set lastdec value
216 	 * otherwise set the advancing stamp to the wake up time
217 	 */
218 	if ((tmo + tmp + 1) < tmp)
219 		reset_timer_masked();
220 	else
221 		tmo += tmp;
222 
223 	while (get_timer_masked() < tmo)
224 		; /* loop till wakeup event */
225 }
226 
227 ulong get_timer(ulong base)
228 {
229 	return get_timer_masked() - base;
230 }
231 
232 void reset_timer_masked(void)
233 {
234 	lastdec = readl(&systimer_base->timer0value) / 1000;
235 	timestamp = 0;
236 }
237 
238 ulong get_timer_masked(void)
239 {
240 	ulong now = readl(&systimer_base->timer0value) / 1000;
241 
242 	if (lastdec >= now) {	/* normal mode (non roll) */
243 		timestamp += lastdec - now;
244 	} else {		/* count down timer overflowed */
245 		/*
246 		 * nts = ts + ld - now
247 		 * ts = old stamp, ld = time before passing through - 1
248 		 * now = amount of time after passing though - 1
249 		 * nts = new "advancing time stamp"
250 		 */
251 		timestamp += lastdec + SYSTIMER_RELOAD - now;
252 	}
253 	lastdec = now;
254 
255 	return timestamp;
256 }
257 
258 void lowlevel_init(void)
259 {
260 }
261 
262 ulong get_board_rev(void){
263 	return readl((u32 *)SYS_ID);
264 }
265 
266 unsigned long long get_ticks(void)
267 {
268 	return get_timer(0);
269 }
270 
271 ulong get_tbclk(void)
272 {
273 	return (ulong)CONFIG_SYS_HZ;
274 }
275