1/*
2 * Copyright (C) 2013 Boundary Devices
3 *
4 * SPDX-License-Identifier:	GPL-2.0+
5 *
6 * Device Configuration Data (DCD)
7 *
8 * Each entry must have the format:
9 * Addr-type           Address        Value
10 *
11 * where:
12 *      Addr-type register length (1,2 or 4 bytes)
13 *      Address   absolute address of the register
14 *      value     value to be stored in the register
15 */
16
17/* DDR IO TYPE */
18DATA 4, MX6_IOM_GRP_DDR_TYPE, 0x000C0000
19DATA 4, MX6_IOM_GRP_DDRPKE, 0x00000000
20/* Clock */
21DATA 4, MX6_IOM_DRAM_SDCLK_0, 0x00000030
22DATA 4, MX6_IOM_DRAM_SDCLK_1, 0x00000030
23/* Address */
24DATA 4, MX6_IOM_DRAM_CAS, 0x00000030
25DATA 4, MX6_IOM_DRAM_RAS, 0x00000030
26DATA 4, MX6_IOM_GRP_ADDDS, 0x00000030
27/* Control */
28DATA 4, MX6_IOM_DRAM_RESET, 0x00000030
29DATA 4, MX6_IOM_DRAM_SDBA2, 0x00000000
30DATA 4, MX6_IOM_DRAM_SDODT0, 0x00000030
31DATA 4, MX6_IOM_DRAM_SDODT1, 0x00000030
32DATA 4, MX6_IOM_GRP_CTLDS, 0x00000030
33/* Data Strobe */
34DATA 4, MX6_IOM_DDRMODE_CTL, 0x00020000
35DATA 4, MX6_IOM_DRAM_SDQS0, 0x00000028
36DATA 4, MX6_IOM_DRAM_SDQS1, 0x00000028
37DATA 4, MX6_IOM_DRAM_SDQS2, 0x00000028
38DATA 4, MX6_IOM_DRAM_SDQS3, 0x00000028
39DATA 4, MX6_IOM_DRAM_SDQS4, 0x00000028
40DATA 4, MX6_IOM_DRAM_SDQS5, 0x00000028
41DATA 4, MX6_IOM_DRAM_SDQS6, 0x00000028
42DATA 4, MX6_IOM_DRAM_SDQS7, 0x00000028
43DATA 4, MX6_IOM_GRP_DDRMODE, 0x00020000
44DATA 4, MX6_IOM_GRP_B0DS, 0x00000028
45DATA 4, MX6_IOM_GRP_B1DS, 0x00000028
46DATA 4, MX6_IOM_GRP_B2DS, 0x00000028
47DATA 4, MX6_IOM_GRP_B3DS, 0x00000028
48DATA 4, MX6_IOM_GRP_B4DS, 0x00000028
49DATA 4, MX6_IOM_GRP_B5DS, 0x00000028
50DATA 4, MX6_IOM_GRP_B6DS, 0x00000028
51DATA 4, MX6_IOM_GRP_B7DS, 0x00000028
52DATA 4, MX6_IOM_DRAM_DQM0, 0x00000028
53DATA 4, MX6_IOM_DRAM_DQM1, 0x00000028
54DATA 4, MX6_IOM_DRAM_DQM2, 0x00000028
55DATA 4, MX6_IOM_DRAM_DQM3, 0x00000028
56DATA 4, MX6_IOM_DRAM_DQM4, 0x00000028
57DATA 4, MX6_IOM_DRAM_DQM5, 0x00000028
58DATA 4, MX6_IOM_DRAM_DQM6, 0x00000028
59DATA 4, MX6_IOM_DRAM_DQM7, 0x00000028
60