1 /*
2  * (C) Copyright 2016 Beniamino Galvani <b.galvani@gmail.com>
3  *
4  * SPDX-License-Identifier:	GPL-2.0+
5  */
6 
7 #include <common.h>
8 #include <dm.h>
9 #include <asm/io.h>
10 #include <asm/arch/gxbb.h>
11 #include <asm/arch/sm.h>
12 #include <phy.h>
13 
14 #define EFUSE_SN_OFFSET		20
15 #define EFUSE_SN_SIZE		16
16 #define EFUSE_MAC_OFFSET	52
17 #define EFUSE_MAC_SIZE		6
18 
19 int board_init(void)
20 {
21 	return 0;
22 }
23 
24 int misc_init_r(void)
25 {
26 	u8 mac_addr[EFUSE_MAC_SIZE];
27 	char serial[EFUSE_SN_SIZE];
28 	ssize_t len;
29 
30 	/* Set RGMII mode */
31 	setbits_le32(GXBB_ETH_REG_0, GXBB_ETH_REG_0_PHY_INTF |
32 				     GXBB_ETH_REG_0_TX_PHASE(1) |
33 				     GXBB_ETH_REG_0_TX_RATIO(4) |
34 				     GXBB_ETH_REG_0_PHY_CLK_EN |
35 				     GXBB_ETH_REG_0_CLK_EN);
36 
37 	/* Enable power and clock gate */
38 	setbits_le32(GXBB_GCLK_MPEG_1, GXBB_GCLK_MPEG_1_ETH);
39 	clrbits_le32(GXBB_MEM_PD_REG_0, GXBB_MEM_PD_REG_0_ETH_MASK);
40 
41 	/* Reset PHY on GPIOZ_14 */
42 	clrbits_le32(GXBB_GPIO_EN(3), BIT(14));
43 	clrbits_le32(GXBB_GPIO_OUT(3), BIT(14));
44 	mdelay(10);
45 	setbits_le32(GXBB_GPIO_OUT(3), BIT(14));
46 
47 	if (!eth_getenv_enetaddr("ethaddr", mac_addr)) {
48 		len = meson_sm_read_efuse(EFUSE_MAC_OFFSET,
49 					  mac_addr, EFUSE_MAC_SIZE);
50 		if (len == EFUSE_MAC_SIZE && is_valid_ethaddr(mac_addr))
51 			eth_setenv_enetaddr("ethaddr", mac_addr);
52 	}
53 
54 	if (!getenv("serial#")) {
55 		len = meson_sm_read_efuse(EFUSE_SN_OFFSET, serial,
56 			EFUSE_SN_SIZE);
57 		if (len == EFUSE_SN_SIZE)
58 			setenv("serial#", serial);
59 	}
60 
61 	return 0;
62 }
63