1*f0892401SMarek Vasut /* 2*f0892401SMarek Vasut * Copyright (C) 2012 Altera Corporation <www.altera.com> 3*f0892401SMarek Vasut * 4*f0892401SMarek Vasut * SPDX-License-Identifier: GPL-2.0+ 5*f0892401SMarek Vasut */ 6*f0892401SMarek Vasut 7*f0892401SMarek Vasut #include <common.h> 8*f0892401SMarek Vasut #include <asm/arch/reset_manager.h> 9*f0892401SMarek Vasut #include <asm/io.h> 10*f0892401SMarek Vasut 11*f0892401SMarek Vasut #include <usb.h> 12*f0892401SMarek Vasut #include <usb/s3c_udc.h> 13*f0892401SMarek Vasut #include <usb_mass_storage.h> 14*f0892401SMarek Vasut 15*f0892401SMarek Vasut #include <micrel.h> 16*f0892401SMarek Vasut #include <netdev.h> 17*f0892401SMarek Vasut #include <phy.h> 18*f0892401SMarek Vasut 19*f0892401SMarek Vasut DECLARE_GLOBAL_DATA_PTR; 20*f0892401SMarek Vasut 21*f0892401SMarek Vasut void s_init(void) {} 22*f0892401SMarek Vasut 23*f0892401SMarek Vasut /* 24*f0892401SMarek Vasut * Miscellaneous platform dependent initialisations 25*f0892401SMarek Vasut */ 26*f0892401SMarek Vasut int board_init(void) 27*f0892401SMarek Vasut { 28*f0892401SMarek Vasut /* Address of boot parameters for ATAG (if ATAG is used) */ 29*f0892401SMarek Vasut gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100; 30*f0892401SMarek Vasut 31*f0892401SMarek Vasut return 0; 32*f0892401SMarek Vasut } 33*f0892401SMarek Vasut 34*f0892401SMarek Vasut /* 35*f0892401SMarek Vasut * PHY configuration 36*f0892401SMarek Vasut */ 37*f0892401SMarek Vasut #ifdef CONFIG_PHY_MICREL_KSZ9021 38*f0892401SMarek Vasut int board_phy_config(struct phy_device *phydev) 39*f0892401SMarek Vasut { 40*f0892401SMarek Vasut int ret; 41*f0892401SMarek Vasut /* 42*f0892401SMarek Vasut * These skew settings for the KSZ9021 ethernet phy is required for ethernet 43*f0892401SMarek Vasut * to work reliably on most flavors of cyclone5 boards. 44*f0892401SMarek Vasut */ 45*f0892401SMarek Vasut ret = ksz9021_phy_extended_write(phydev, 46*f0892401SMarek Vasut MII_KSZ9021_EXT_RGMII_RX_DATA_SKEW, 47*f0892401SMarek Vasut 0x0); 48*f0892401SMarek Vasut if (ret) 49*f0892401SMarek Vasut return ret; 50*f0892401SMarek Vasut 51*f0892401SMarek Vasut ret = ksz9021_phy_extended_write(phydev, 52*f0892401SMarek Vasut MII_KSZ9021_EXT_RGMII_TX_DATA_SKEW, 53*f0892401SMarek Vasut 0x0); 54*f0892401SMarek Vasut if (ret) 55*f0892401SMarek Vasut return ret; 56*f0892401SMarek Vasut 57*f0892401SMarek Vasut ret = ksz9021_phy_extended_write(phydev, 58*f0892401SMarek Vasut MII_KSZ9021_EXT_RGMII_CLOCK_SKEW, 59*f0892401SMarek Vasut 0xf0f0); 60*f0892401SMarek Vasut if (ret) 61*f0892401SMarek Vasut return ret; 62*f0892401SMarek Vasut 63*f0892401SMarek Vasut if (phydev->drv->config) 64*f0892401SMarek Vasut return phydev->drv->config(phydev); 65*f0892401SMarek Vasut 66*f0892401SMarek Vasut return 0; 67*f0892401SMarek Vasut } 68*f0892401SMarek Vasut #endif 69*f0892401SMarek Vasut 70*f0892401SMarek Vasut #ifdef CONFIG_USB_GADGET 71*f0892401SMarek Vasut struct s3c_plat_otg_data socfpga_otg_data = { 72*f0892401SMarek Vasut .regs_otg = CONFIG_USB_DWC2_REG_ADDR, 73*f0892401SMarek Vasut .usb_gusbcfg = 0x1417, 74*f0892401SMarek Vasut }; 75*f0892401SMarek Vasut 76*f0892401SMarek Vasut int board_usb_init(int index, enum usb_init_type init) 77*f0892401SMarek Vasut { 78*f0892401SMarek Vasut return s3c_udc_probe(&socfpga_otg_data); 79*f0892401SMarek Vasut } 80*f0892401SMarek Vasut 81*f0892401SMarek Vasut int g_dnl_board_usb_cable_connected(void) 82*f0892401SMarek Vasut { 83*f0892401SMarek Vasut return 1; 84*f0892401SMarek Vasut } 85*f0892401SMarek Vasut #endif 86