1 /*
2  *  Copyright (C) 2012 Altera Corporation <www.altera.com>
3  *
4  * SPDX-License-Identifier:	GPL-2.0+
5  */
6 
7 #include <common.h>
8 #include <asm/arch/reset_manager.h>
9 #include <asm/io.h>
10 
11 #include <usb.h>
12 #include <usb/s3c_udc.h>
13 #include <usb_mass_storage.h>
14 
15 #include <micrel.h>
16 #include <netdev.h>
17 #include <phy.h>
18 
19 DECLARE_GLOBAL_DATA_PTR;
20 
21 void s_init(void) {}
22 
23 /*
24  * Miscellaneous platform dependent initialisations
25  */
26 int board_init(void)
27 {
28 	/* Address of boot parameters for ATAG (if ATAG is used) */
29 	gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
30 
31 	return 0;
32 }
33 
34 /*
35  * PHY configuration
36  */
37 #ifdef CONFIG_PHY_MICREL_KSZ9021
38 int board_phy_config(struct phy_device *phydev)
39 {
40 	int ret;
41 	/*
42 	 * These skew settings for the KSZ9021 ethernet phy is required for ethernet
43 	 * to work reliably on most flavors of cyclone5 boards.
44 	 */
45 	ret = ksz9021_phy_extended_write(phydev,
46 					 MII_KSZ9021_EXT_RGMII_RX_DATA_SKEW,
47 					 0x0);
48 	if (ret)
49 		return ret;
50 
51 	ret = ksz9021_phy_extended_write(phydev,
52 					 MII_KSZ9021_EXT_RGMII_TX_DATA_SKEW,
53 					 0x0);
54 	if (ret)
55 		return ret;
56 
57 	ret = ksz9021_phy_extended_write(phydev,
58 					 MII_KSZ9021_EXT_RGMII_CLOCK_SKEW,
59 					 0xf0f0);
60 	if (ret)
61 		return ret;
62 
63 	if (phydev->drv->config)
64 		return phydev->drv->config(phydev);
65 
66 	return 0;
67 }
68 #endif
69 
70 #ifdef CONFIG_USB_GADGET
71 struct s3c_plat_otg_data socfpga_otg_data = {
72 	.regs_otg	= CONFIG_USB_DWC2_REG_ADDR,
73 	.usb_gusbcfg	= 0x1417,
74 };
75 
76 int board_usb_init(int index, enum usb_init_type init)
77 {
78 	return s3c_udc_probe(&socfpga_otg_data);
79 }
80 
81 int g_dnl_board_usb_cable_connected(void)
82 {
83 	return 1;
84 }
85 #endif
86