1 /*
2  * Copyright (C) 2010  Eric C. Cooper <ecc@cmu.edu>
3  *
4  * Based on sheevaplug.c originally written by
5  * Prafulla Wadaskar <prafulla@marvell.com>
6  * (C) Copyright 2009
7  * Marvell Semiconductor <www.marvell.com>
8  *
9  * See file CREDITS for list of people who contributed to this
10  * project.
11  *
12  * This program is free software; you can redistribute it and/or
13  * modify it under the terms of the GNU General Public License as
14  * published by the Free Software Foundation; either version 2 of
15  * the License, or (at your option) any later version.
16  *
17  * This program is distributed in the hope that it will be useful,
18  * but WITHOUT ANY WARRANTY; without even the implied warranty of
19  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20  * GNU General Public License for more details.
21  *
22  * You should have received a copy of the GNU General Public License
23  * along with this program; if not, write to the Free Software
24  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
25  * MA 02110-1301 USA
26  */
27 
28 #include <common.h>
29 #include <miiphy.h>
30 #include <asm/arch/kirkwood.h>
31 #include <asm/arch/mpp.h>
32 #include <asm/arch/cpu.h>
33 #include <asm/io.h>
34 #include "dockstar.h"
35 
36 DECLARE_GLOBAL_DATA_PTR;
37 
38 int board_early_init_f(void)
39 {
40 	/*
41 	 * default gpio configuration
42 	 * There are maximum 64 gpios controlled through 2 sets of registers
43 	 * the  below configuration configures mainly initial LED status
44 	 */
45 	kw_config_gpio(DOCKSTAR_OE_VAL_LOW,
46 			DOCKSTAR_OE_VAL_HIGH,
47 			DOCKSTAR_OE_LOW, DOCKSTAR_OE_HIGH);
48 
49 	/* Multi-Purpose Pins Functionality configuration */
50 	u32 kwmpp_config[] = {
51 		MPP0_NF_IO2,
52 		MPP1_NF_IO3,
53 		MPP2_NF_IO4,
54 		MPP3_NF_IO5,
55 		MPP4_NF_IO6,
56 		MPP5_NF_IO7,
57 		MPP6_SYSRST_OUTn,
58 		MPP7_GPO,
59 		MPP8_UART0_RTS,
60 		MPP9_UART0_CTS,
61 		MPP10_UART0_TXD,
62 		MPP11_UART0_RXD,
63 		MPP12_SD_CLK,
64 		MPP13_SD_CMD,
65 		MPP14_SD_D0,
66 		MPP15_SD_D1,
67 		MPP16_SD_D2,
68 		MPP17_SD_D3,
69 		MPP18_NF_IO0,
70 		MPP19_NF_IO1,
71 		MPP20_GPIO,
72 		MPP21_GPIO,
73 		MPP22_GPIO,
74 		MPP23_GPIO,
75 		MPP24_GPIO,
76 		MPP25_GPIO,
77 		MPP26_GPIO,
78 		MPP27_GPIO,
79 		MPP28_GPIO,
80 		MPP29_TSMP9,
81 		MPP30_GPIO,
82 		MPP31_GPIO,
83 		MPP32_GPIO,
84 		MPP33_GPIO,
85 		MPP34_GPIO,
86 		MPP35_GPIO,
87 		MPP36_GPIO,
88 		MPP37_GPIO,
89 		MPP38_GPIO,
90 		MPP39_GPIO,
91 		MPP40_GPIO,
92 		MPP41_GPIO,
93 		MPP42_GPIO,
94 		MPP43_GPIO,
95 		MPP44_GPIO,
96 		MPP45_GPIO,
97 		MPP46_GPIO,
98 		MPP47_GPIO,
99 		MPP48_GPIO,
100 		MPP49_GPIO,
101 		0
102 	};
103 	kirkwood_mpp_conf(kwmpp_config);
104 	return 0;
105 }
106 
107 int board_init(void)
108 {
109 	/*
110 	 * arch number of board
111 	 */
112 	gd->bd->bi_arch_number = MACH_TYPE_DOCKSTAR;
113 
114 	/* address of boot parameters */
115 	gd->bd->bi_boot_params = kw_sdram_bar(0) + 0x100;
116 
117 	return 0;
118 }
119 
120 #ifdef CONFIG_RESET_PHY_R
121 /* Configure and enable MV88E1116 PHY */
122 void reset_phy(void)
123 {
124 	u16 reg;
125 	u16 devadr;
126 	char *name = "egiga0";
127 
128 	if (miiphy_set_current_dev(name))
129 		return;
130 
131 	/* command to read PHY dev address */
132 	if (miiphy_read(name, 0xEE, 0xEE, (u16 *) &devadr)) {
133 		printf("Err..%s could not read PHY dev address\n",
134 			__FUNCTION__);
135 		return;
136 	}
137 
138 	/*
139 	 * Enable RGMII delay on Tx and Rx for CPU port
140 	 * Ref: sec 4.7.2 of chip datasheet
141 	 */
142 	miiphy_write(name, devadr, MV88E1116_PGADR_REG, 2);
143 	miiphy_read(name, devadr, MV88E1116_MAC_CTRL_REG, &reg);
144 	reg |= (MV88E1116_RGMII_RXTM_CTRL | MV88E1116_RGMII_TXTM_CTRL);
145 	miiphy_write(name, devadr, MV88E1116_MAC_CTRL_REG, reg);
146 	miiphy_write(name, devadr, MV88E1116_PGADR_REG, 0);
147 
148 	/* reset the phy */
149 	miiphy_reset(name, devadr);
150 
151 	printf("88E1116 Initialized on %s\n", name);
152 }
153 #endif /* CONFIG_RESET_PHY_R */
154 
155 #define GREEN_LED	(1 << 14)
156 #define ORANGE_LED	(1 << 15)
157 #define BOTH_LEDS	(GREEN_LED | ORANGE_LED)
158 #define NEITHER_LED	0
159 
160 static void set_leds(u32 leds, u32 blinking)
161 {
162 	struct kwgpio_registers *r = (struct kwgpio_registers *)KW_GPIO1_BASE;
163 	u32 oe = readl(&r->oe) | BOTH_LEDS;
164 	writel(oe & ~leds, &r->oe);	/* active low */
165 	u32 bl = readl(&r->blink_en) & ~BOTH_LEDS;
166 	writel(bl | blinking, &r->blink_en);
167 }
168 
169 void show_boot_progress(int val)
170 {
171 	switch (val) {
172 	case 15:		/* booting Linux */
173 		set_leds(BOTH_LEDS, NEITHER_LED);
174 		break;
175 	case 64:		/* Ethernet initialization */
176 		set_leds(GREEN_LED, GREEN_LED);
177 		break;
178 	default:
179 		if (val < 0)	/* error */
180 			set_leds(ORANGE_LED, ORANGE_LED);
181 		break;
182 	}
183 }
184