1 /*
2  * Copyright (C) 2010  Eric C. Cooper <ecc@cmu.edu>
3  *
4  * Based on sheevaplug.c originally written by
5  * Prafulla Wadaskar <prafulla@marvell.com>
6  * (C) Copyright 2009
7  * Marvell Semiconductor <www.marvell.com>
8  *
9  * See file CREDITS for list of people who contributed to this
10  * project.
11  *
12  * This program is free software; you can redistribute it and/or
13  * modify it under the terms of the GNU General Public License as
14  * published by the Free Software Foundation; either version 2 of
15  * the License, or (at your option) any later version.
16  *
17  * This program is distributed in the hope that it will be useful,
18  * but WITHOUT ANY WARRANTY; without even the implied warranty of
19  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20  * GNU General Public License for more details.
21  *
22  * You should have received a copy of the GNU General Public License
23  * along with this program; if not, write to the Free Software
24  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
25  * MA 02110-1301 USA
26  */
27 
28 #include <common.h>
29 #include <miiphy.h>
30 #include <asm/arch/kirkwood.h>
31 #include <asm/arch/mpp.h>
32 #include "dockstar.h"
33 
34 DECLARE_GLOBAL_DATA_PTR;
35 
36 int board_early_init_f(void)
37 {
38 	/*
39 	 * default gpio configuration
40 	 * There are maximum 64 gpios controlled through 2 sets of registers
41 	 * the  below configuration configures mainly initial LED status
42 	 */
43 	kw_config_gpio(DOCKSTAR_OE_VAL_LOW,
44 			DOCKSTAR_OE_VAL_HIGH,
45 			DOCKSTAR_OE_LOW, DOCKSTAR_OE_HIGH);
46 
47 	/* Multi-Purpose Pins Functionality configuration */
48 	u32 kwmpp_config[] = {
49 		MPP0_NF_IO2,
50 		MPP1_NF_IO3,
51 		MPP2_NF_IO4,
52 		MPP3_NF_IO5,
53 		MPP4_NF_IO6,
54 		MPP5_NF_IO7,
55 		MPP6_SYSRST_OUTn,
56 		MPP7_GPO,
57 		MPP8_UART0_RTS,
58 		MPP9_UART0_CTS,
59 		MPP10_UART0_TXD,
60 		MPP11_UART0_RXD,
61 		MPP12_SD_CLK,
62 		MPP13_SD_CMD,
63 		MPP14_SD_D0,
64 		MPP15_SD_D1,
65 		MPP16_SD_D2,
66 		MPP17_SD_D3,
67 		MPP18_NF_IO0,
68 		MPP19_NF_IO1,
69 		MPP20_GPIO,
70 		MPP21_GPIO,
71 		MPP22_GPIO,
72 		MPP23_GPIO,
73 		MPP24_GPIO,
74 		MPP25_GPIO,
75 		MPP26_GPIO,
76 		MPP27_GPIO,
77 		MPP28_GPIO,
78 		MPP29_TSMP9,
79 		MPP30_GPIO,
80 		MPP31_GPIO,
81 		MPP32_GPIO,
82 		MPP33_GPIO,
83 		MPP34_GPIO,
84 		MPP35_GPIO,
85 		MPP36_GPIO,
86 		MPP37_GPIO,
87 		MPP38_GPIO,
88 		MPP39_GPIO,
89 		MPP40_GPIO,
90 		MPP41_GPIO,
91 		MPP42_GPIO,
92 		MPP43_GPIO,
93 		MPP44_GPIO,
94 		MPP45_GPIO,
95 		MPP46_GPIO,
96 		MPP47_GPIO,
97 		MPP48_GPIO,
98 		MPP49_GPIO,
99 		0
100 	};
101 	kirkwood_mpp_conf(kwmpp_config);
102 	return 0;
103 }
104 
105 int board_init(void)
106 {
107 	/*
108 	 * arch number of board
109 	 */
110 	gd->bd->bi_arch_number = MACH_TYPE_DOCKSTAR;
111 
112 	/* address of boot parameters */
113 	gd->bd->bi_boot_params = kw_sdram_bar(0) + 0x100;
114 
115 	return 0;
116 }
117 
118 #ifdef CONFIG_RESET_PHY_R
119 /* Configure and enable MV88E1116 PHY */
120 void reset_phy(void)
121 {
122 	u16 reg;
123 	u16 devadr;
124 	char *name = "egiga0";
125 
126 	if (miiphy_set_current_dev(name))
127 		return;
128 
129 	/* command to read PHY dev address */
130 	if (miiphy_read(name, 0xEE, 0xEE, (u16 *) &devadr)) {
131 		printf("Err..%s could not read PHY dev address\n",
132 			__FUNCTION__);
133 		return;
134 	}
135 
136 	/*
137 	 * Enable RGMII delay on Tx and Rx for CPU port
138 	 * Ref: sec 4.7.2 of chip datasheet
139 	 */
140 	miiphy_write(name, devadr, MV88E1116_PGADR_REG, 2);
141 	miiphy_read(name, devadr, MV88E1116_MAC_CTRL_REG, &reg);
142 	reg |= (MV88E1116_RGMII_RXTM_CTRL | MV88E1116_RGMII_TXTM_CTRL);
143 	miiphy_write(name, devadr, MV88E1116_MAC_CTRL_REG, reg);
144 	miiphy_write(name, devadr, MV88E1116_PGADR_REG, 0);
145 
146 	/* reset the phy */
147 	miiphy_reset(name, devadr);
148 
149 	printf("88E1116 Initialized on %s\n", name);
150 }
151 #endif /* CONFIG_RESET_PHY_R */
152 
153 #define GREEN_LED	(1 << 14)
154 #define ORANGE_LED	(1 << 15)
155 #define BOTH_LEDS	(GREEN_LED | ORANGE_LED)
156 #define NEITHER_LED	0
157 
158 static void set_leds(u32 leds, u32 blinking)
159 {
160 	struct kwgpio_registers *r = (struct kwgpio_registers *)KW_GPIO1_BASE;
161 	u32 oe = readl(&r->oe) | BOTH_LEDS;
162 	writel(oe & ~leds, &r->oe);	/* active low */
163 	u32 bl = readl(&r->blink_en) & ~BOTH_LEDS;
164 	writel(bl | blinking, &r->blink_en);
165 }
166 
167 void show_boot_progress(int val)
168 {
169 	switch (val) {
170 	case 15:		/* booting Linux */
171 		set_leds(BOTH_LEDS, NEITHER_LED);
172 		break;
173 	case 64:		/* Ethernet initialization */
174 		set_leds(GREEN_LED, GREEN_LED);
175 		break;
176 	default:
177 		if (val < 0)	/* error */
178 			set_leds(ORANGE_LED, ORANGE_LED);
179 		break;
180 	}
181 }
182