1 /*
2  * Copyright (C) 2015 Stefan Roese <sr@denx.de>
3  *
4  * SPDX-License-Identifier:	GPL-2.0+
5  */
6 
7 #include <common.h>
8 #include <i2c.h>
9 #include <miiphy.h>
10 #include <asm/io.h>
11 #include <asm/arch/cpu.h>
12 #include <asm/arch/soc.h>
13 
14 DECLARE_GLOBAL_DATA_PTR;
15 
16 #define BIT(nr)				(1UL << (nr))
17 
18 #define ETH_PHY_CTRL_REG		0
19 #define ETH_PHY_CTRL_POWER_DOWN_BIT	11
20 #define ETH_PHY_CTRL_POWER_DOWN_MASK	(1 << ETH_PHY_CTRL_POWER_DOWN_BIT)
21 
22 /*
23  * Those values and defines are taken from the Marvell U-Boot version
24  * "u-boot-2013.01-2014_T3.0"
25  */
26 #define DB_GP_88F68XX_GPP_OUT_ENA_LOW					\
27 	(~(BIT(1)  | BIT(4)  | BIT(6)  | BIT(7)  | BIT(8)  | BIT(9)  |	\
28 	   BIT(10) | BIT(11) | BIT(19) | BIT(22) | BIT(23) | BIT(25) |	\
29 	   BIT(26) | BIT(27) | BIT(29) | BIT(30) | BIT(31)))
30 #define DB_GP_88F68XX_GPP_OUT_ENA_MID					\
31 	(~(BIT(0) | BIT(1) | BIT(2) | BIT(3) | BIT(4) | BIT(15) |	\
32 	   BIT(16) | BIT(17) | BIT(18)))
33 
34 #define DB_GP_88F68XX_GPP_OUT_VAL_LOW	0x0
35 #define DB_GP_88F68XX_GPP_OUT_VAL_MID	0x0
36 #define DB_GP_88F68XX_GPP_POL_LOW	0x0
37 #define DB_GP_88F68XX_GPP_POL_MID	0x0
38 
39 /* IO expander on Marvell GP board includes e.g. fan enabling */
40 struct marvell_io_exp {
41 	u8 chip;
42 	u8 addr;
43 	u8 val;
44 };
45 
46 static struct marvell_io_exp io_exp[] = {
47 	{ 0x20, 6, 0x20 }, /* Configuration registers: Bit on --> Input bits */
48 	{ 0x20, 7, 0xC3 }, /* Configuration registers: Bit on --> Input bits */
49 	{ 0x20, 2, 0x1D }, /* Output Data, register#0 */
50 	{ 0x20, 3, 0x18 }, /* Output Data, register#1 */
51 	{ 0x21, 6, 0xC3 }, /* Configuration registers: Bit on --> Input bits  */
52 	{ 0x21, 7, 0x31 }, /* Configuration registers: Bit on --> Input bits  */
53 	{ 0x21, 2, 0x08 }, /* Output Data, register#0 */
54 	{ 0x21, 3, 0xC0 }  /* Output Data, register#1 */
55 };
56 
57 int board_early_init_f(void)
58 {
59 	/* Configure MPP */
60 	writel(0x11111111, MVEBU_MPP_BASE + 0x00);
61 	writel(0x11111111, MVEBU_MPP_BASE + 0x04);
62 	writel(0x11244011, MVEBU_MPP_BASE + 0x08);
63 	writel(0x22222111, MVEBU_MPP_BASE + 0x0c);
64 	writel(0x22200002, MVEBU_MPP_BASE + 0x10);
65 	writel(0x30042022, MVEBU_MPP_BASE + 0x14);
66 	writel(0x55550555, MVEBU_MPP_BASE + 0x18);
67 	writel(0x00005550, MVEBU_MPP_BASE + 0x1c);
68 
69 	/* Set GPP Out value */
70 	writel(DB_GP_88F68XX_GPP_OUT_VAL_LOW, MVEBU_GPIO0_BASE + 0x00);
71 	writel(DB_GP_88F68XX_GPP_OUT_VAL_MID, MVEBU_GPIO1_BASE + 0x00);
72 
73 	/* Set GPP Polarity */
74 	writel(DB_GP_88F68XX_GPP_POL_LOW, MVEBU_GPIO0_BASE + 0x0c);
75 	writel(DB_GP_88F68XX_GPP_POL_MID, MVEBU_GPIO1_BASE + 0x0c);
76 
77 	/* Set GPP Out Enable */
78 	writel(DB_GP_88F68XX_GPP_OUT_ENA_LOW, MVEBU_GPIO0_BASE + 0x04);
79 	writel(DB_GP_88F68XX_GPP_OUT_ENA_MID, MVEBU_GPIO1_BASE + 0x04);
80 
81 	return 0;
82 }
83 
84 int board_init(void)
85 {
86 	int i;
87 
88 	/* adress of boot parameters */
89 	gd->bd->bi_boot_params = mvebu_sdram_bar(0) + 0x100;
90 
91 	/* Init I2C IO expanders */
92 	for (i = 0; i < ARRAY_SIZE(io_exp); i++)
93 		i2c_write(io_exp[i].chip, io_exp[i].addr, 1, &io_exp[i].val, 1);
94 
95 	return 0;
96 }
97 
98 int checkboard(void)
99 {
100 	puts("Board: Marvell DB-88F6820-GP\n");
101 
102 	return 0;
103 }
104