1 /*
2  * Copyright (C) 2011 Simon Guinot <sguinot@lacie.com>
3  *
4  * Based on Kirkwood support:
5  * (C) Copyright 2009
6  * Marvell Semiconductor <www.marvell.com>
7  * Written-by: Prafulla Wadaskar <prafulla@marvell.com>
8  *
9  * SPDX-License-Identifier:	GPL-2.0+
10  */
11 
12 #include <common.h>
13 #include <command.h>
14 #include <environment.h>
15 #include <asm/mach-types.h>
16 #include <asm/arch/cpu.h>
17 #include <asm/arch/soc.h>
18 #include <asm/arch/mpp.h>
19 #include <asm/arch/gpio.h>
20 
21 #include "netspace_v2.h"
22 #include "../common/common.h"
23 
24 DECLARE_GLOBAL_DATA_PTR;
25 
26 int board_early_init_f(void)
27 {
28 	/* Gpio configuration */
29 	mvebu_config_gpio(NETSPACE_V2_OE_VAL_LOW, NETSPACE_V2_OE_VAL_HIGH,
30 			  NETSPACE_V2_OE_LOW, NETSPACE_V2_OE_HIGH);
31 
32 	/* Multi-Purpose Pins Functionality configuration */
33 	static const u32 kwmpp_config[] = {
34 		MPP0_SPI_SCn,
35 		MPP1_SPI_MOSI,
36 		MPP2_SPI_SCK,
37 		MPP3_SPI_MISO,
38 		MPP4_NF_IO6,
39 		MPP5_NF_IO7,
40 		MPP6_SYSRST_OUTn,
41 		MPP7_GPO,		/* Fan speed (bit 1) */
42 		MPP8_TW_SDA,
43 		MPP9_TW_SCK,
44 		MPP10_UART0_TXD,
45 		MPP11_UART0_RXD,
46 		MPP12_GPO,		/* Red led */
47 		MPP14_GPIO,		/* USB fuse */
48 		MPP16_GPIO,		/* SATA 0 power */
49 		MPP17_GPIO,		/* SATA 1 power */
50 		MPP18_NF_IO0,
51 		MPP19_NF_IO1,
52 		MPP20_SATA1_ACTn,
53 		MPP21_SATA0_ACTn,
54 		MPP22_GPIO,		/* Fan speed (bit 0) */
55 		MPP23_GPIO,		/* Fan power */
56 		MPP24_GPIO,		/* USB mode select */
57 		MPP25_GPIO,		/* Fan rotation fail */
58 		MPP26_GPIO,		/* USB vbus-in detection */
59 		MPP28_GPIO,		/* USB enable vbus-out */
60 		MPP29_GPIO,		/* Blue led (slow register) */
61 		MPP30_GPIO,		/* Blue led (command register) */
62 		MPP31_GPIO,		/* Board power off */
63 		MPP32_GPIO,		/* Button (0 = Released, 1 = Pushed) */
64 		MPP33_GPIO,		/* Fan speed (bit 2) */
65 		0
66 	};
67 	kirkwood_mpp_conf(kwmpp_config, NULL);
68 
69 	return 0;
70 }
71 
72 int board_init(void)
73 {
74 	/* Machine number */
75 	gd->bd->bi_arch_number = CONFIG_MACH_TYPE;
76 
77 	/* Boot parameters address */
78 	gd->bd->bi_boot_params = mvebu_sdram_bar(0) + 0x100;
79 
80 	return 0;
81 }
82 
83 #if defined(CONFIG_MISC_INIT_R)
84 int misc_init_r(void)
85 {
86 #if defined(CONFIG_CMD_I2C) && defined(CONFIG_SYS_I2C_EEPROM_ADDR)
87 	if (!env_get("ethaddr")) {
88 		uchar mac[6];
89 		if (lacie_read_mac_address(mac) == 0)
90 			eth_env_set_enetaddr("ethaddr", mac);
91 	}
92 #endif
93 	return 0;
94 }
95 #endif
96 
97 #if defined(CONFIG_CMD_NET) && defined(CONFIG_RESET_PHY_R)
98 /* Configure and initialize PHY */
99 void reset_phy(void)
100 {
101 #if defined(CONFIG_NETSPACE_LITE_V2) || defined(CONFIG_NETSPACE_MINI_V2)
102 	mv_phy_88e1318_init("egiga0", 0);
103 #else
104 	mv_phy_88e1116_init("egiga0", 8);
105 #endif
106 }
107 #endif
108 
109 #if defined(CONFIG_KIRKWOOD_GPIO)
110 /* Return GPIO button status */
111 static int
112 do_read_button(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
113 {
114 	return kw_gpio_get_value(NETSPACE_V2_GPIO_BUTTON);
115 }
116 
117 U_BOOT_CMD(button, 1, 1, do_read_button,
118 	   "Return GPIO button status 0=off 1=on", "");
119 #endif
120