1 /* 2 * Copyright (C) 2011 Simon Guinot <sguinot@lacie.com> 3 * 4 * Based on Kirkwood support: 5 * (C) Copyright 2009 6 * Marvell Semiconductor <www.marvell.com> 7 * Written-by: Prafulla Wadaskar <prafulla@marvell.com> 8 * 9 * See file CREDITS for list of people who contributed to this 10 * project. 11 * 12 * This program is free software; you can redistribute it and/or 13 * modify it under the terms of the GNU General Public License as 14 * published by the Free Software Foundation; either version 2 of 15 * the License, or (at your option) any later version. 16 * 17 * This program is distributed in the hope that it will be useful, 18 * but WITHOUT ANY WARRANTY; without even the implied warranty of 19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 20 * GNU General Public License for more details. 21 */ 22 23 #include <common.h> 24 #include <miiphy.h> 25 #include <netdev.h> 26 #include <command.h> 27 #include <asm/arch/cpu.h> 28 #include <asm/arch/kirkwood.h> 29 #include <asm/arch/mpp.h> 30 #include <asm/arch/gpio.h> 31 #include "netspace_v2.h" 32 33 DECLARE_GLOBAL_DATA_PTR; 34 35 int board_early_init_f(void) 36 { 37 /* Gpio configuration */ 38 kw_config_gpio(NETSPACE_V2_OE_VAL_LOW, NETSPACE_V2_OE_VAL_HIGH, 39 NETSPACE_V2_OE_LOW, NETSPACE_V2_OE_HIGH); 40 41 /* Multi-Purpose Pins Functionality configuration */ 42 u32 kwmpp_config[] = { 43 MPP0_SPI_SCn, 44 MPP1_SPI_MOSI, 45 MPP2_SPI_SCK, 46 MPP3_SPI_MISO, 47 MPP4_NF_IO6, 48 MPP5_NF_IO7, 49 MPP6_SYSRST_OUTn, 50 MPP7_GPO, /* Fan speed (bit 1) */ 51 MPP8_TW_SDA, 52 MPP9_TW_SCK, 53 MPP10_UART0_TXD, 54 MPP11_UART0_RXD, 55 MPP12_GPO, /* Red led */ 56 MPP14_GPIO, /* USB fuse */ 57 MPP16_GPIO, /* SATA 0 power */ 58 MPP17_GPIO, /* SATA 1 power */ 59 MPP18_NF_IO0, 60 MPP19_NF_IO1, 61 MPP20_SATA1_ACTn, 62 MPP21_SATA0_ACTn, 63 MPP22_GPIO, /* Fan speed (bit 0) */ 64 MPP23_GPIO, /* Fan power */ 65 MPP24_GPIO, /* USB mode select */ 66 MPP25_GPIO, /* Fan rotation fail */ 67 MPP26_GPIO, /* USB vbus-in detection */ 68 MPP28_GPIO, /* USB enable vbus-out */ 69 MPP29_GPIO, /* Blue led (slow register) */ 70 MPP30_GPIO, /* Blue led (command register) */ 71 MPP31_GPIO, /* Board power off */ 72 MPP32_GPIO, /* Button (0 = Released, 1 = Pushed) */ 73 MPP33_GPIO, /* Fan speed (bit 2) */ 74 0 75 }; 76 kirkwood_mpp_conf(kwmpp_config); 77 78 return 0; 79 } 80 81 int board_init(void) 82 { 83 /* Machine number */ 84 gd->bd->bi_arch_number = CONFIG_MACH_TYPE; 85 86 /* Boot parameters address */ 87 gd->bd->bi_boot_params = kw_sdram_bar(0) + 0x100; 88 89 return 0; 90 } 91 92 void mv_phy_88e1116_init(char *name) 93 { 94 u16 reg; 95 u16 devadr; 96 97 if (miiphy_set_current_dev(name)) 98 return; 99 100 /* command to read PHY dev address */ 101 if (miiphy_read(name, 0xEE, 0xEE, (u16 *) &devadr)) { 102 printf("Err..(%s) could not read PHY dev address\n", __func__); 103 return; 104 } 105 106 /* 107 * Enable RGMII delay on Tx and Rx for CPU port 108 * Ref: sec 4.7.2 of chip datasheet 109 */ 110 miiphy_write(name, devadr, MV88E1116_PGADR_REG, 2); 111 miiphy_read(name, devadr, MV88E1116_MAC_CTRL_REG, ®); 112 reg |= (MV88E1116_RGMII_RXTM_CTRL | MV88E1116_RGMII_TXTM_CTRL); 113 miiphy_write(name, devadr, MV88E1116_MAC_CTRL_REG, reg); 114 miiphy_write(name, devadr, MV88E1116_PGADR_REG, 0); 115 116 /* reset the phy */ 117 if (miiphy_read(name, devadr, MII_BMCR, ®) != 0) { 118 printf("Err..(%s) PHY status read failed\n", __func__); 119 return; 120 } 121 if (miiphy_write(name, devadr, MII_BMCR, reg | 0x8000) != 0) { 122 printf("Err..(%s) PHY reset failed\n", __func__); 123 return; 124 } 125 126 debug("88E1116 Initialized on %s\n", name); 127 } 128 129 /* Configure and initialize PHY */ 130 void reset_phy(void) 131 { 132 mv_phy_88e1116_init("egiga0"); 133 } 134 135 /* Return GPIO button status */ 136 static int 137 do_read_button(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) 138 { 139 return kw_gpio_get_value(NETSPACE_V2_GPIO_BUTTON); 140 } 141 142 U_BOOT_CMD(button, 1, 1, do_read_button, 143 "Return GPIO button status 0=off 1=on", ""); 144