1 /*
2  * (C) Copyright 2005-2009
3  * BuS Elektronik GmbH & Co.KG <esw@bus-elektonik.de>
4  *
5  * (C) Copyright 2000-2003
6  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
7  *
8  * SPDX-License-Identifier:	GPL-2.0+
9  */
10 
11 #include <common.h>
12 #include <command.h>
13 #include "asm/m5282.h"
14 #include <bmp_layout.h>
15 #include <status_led.h>
16 #include <bus_vcxk.h>
17 
18 /*---------------------------------------------------------------------------*/
19 
20 DECLARE_GLOBAL_DATA_PTR;
21 
22 #ifdef CONFIG_VIDEO
23 unsigned long display_width;
24 unsigned long display_height;
25 #endif
26 
27 /*---------------------------------------------------------------------------*/
28 
29 int checkboard (void)
30 {
31 	puts("Board: EB+CPU5282 (BuS Elektronik GmbH & Co. KG)\n");
32 #if (CONFIG_SYS_TEXT_BASE ==  CONFIG_SYS_INT_FLASH_BASE)
33 	puts("       Boot from Internal FLASH\n");
34 #endif
35 	return 0;
36 }
37 
38 int dram_init(void)
39 {
40 	int size, i;
41 
42 	size = 0;
43 	MCFSDRAMC_DCR = MCFSDRAMC_DCR_RTIM_6 |
44 			MCFSDRAMC_DCR_RC((15 * CONFIG_SYS_CLK / 1000000) >> 4);
45 	asm (" nop");
46 #ifdef CONFIG_SYS_SDRAM_BASE0
47 	MCFSDRAMC_DACR0 = MCFSDRAMC_DACR_BASE(CONFIG_SYS_SDRAM_BASE0)|
48 		MCFSDRAMC_DACR_CASL(1) | MCFSDRAMC_DACR_CBM(3) |
49 		MCFSDRAMC_DACR_PS_32;
50 	asm (" nop");
51 
52 	MCFSDRAMC_DMR0 = MCFSDRAMC_DMR_BAM_16M | MCFSDRAMC_DMR_V;
53 	asm (" nop");
54 
55 	MCFSDRAMC_DACR0 |= MCFSDRAMC_DACR_IP;
56 	asm (" nop");
57 	for (i = 0; i < 10; i++)
58 		asm (" nop");
59 
60 	*(unsigned long *)(CONFIG_SYS_SDRAM_BASE0) = 0xA5A5A5A5;
61 	asm (" nop");
62 	MCFSDRAMC_DACR0 |= MCFSDRAMC_DACR_RE;
63 	asm (" nop");
64 
65 	for (i = 0; i < 2000; i++)
66 		asm (" nop");
67 
68 	MCFSDRAMC_DACR0 |= MCFSDRAMC_DACR_IMRS;
69 	asm (" nop");
70 	/* write SDRAM mode register */
71 	*(unsigned long *)(CONFIG_SYS_SDRAM_BASE0 + 0x80440) = 0xA5A5A5A5;
72 	asm (" nop");
73 	size += CONFIG_SYS_SDRAM_SIZE0 * 1024 * 1024;
74 #endif
75 #ifdef CONFIG_SYS_SDRAM_BASE1xx
76 	MCFSDRAMC_DACR1 = MCFSDRAMC_DACR_BASE (CONFIG_SYS_SDRAM_BASE1)
77 			| MCFSDRAMC_DACR_CASL (1)
78 			| MCFSDRAMC_DACR_CBM (3)
79 			| MCFSDRAMC_DACR_PS_16;
80 
81 	MCFSDRAMC_DMR1 = MCFSDRAMC_DMR_BAM_16M | MCFSDRAMC_DMR_V;
82 
83 	MCFSDRAMC_DACR1 |= MCFSDRAMC_DACR_IP;
84 
85 	*(unsigned short *) (CONFIG_SYS_SDRAM_BASE1) = 0xA5A5;
86 	MCFSDRAMC_DACR1 |= MCFSDRAMC_DACR_RE;
87 
88 	for (i = 0; i < 2000; i++)
89 		asm (" nop");
90 
91 	MCFSDRAMC_DACR1 |= MCFSDRAMC_DACR_IMRS;
92 	*(unsigned int *) (CONFIG_SYS_SDRAM_BASE1 + 0x220) = 0xA5A5;
93 	size += CONFIG_SYS_SDRAM_SIZE1 * 1024 * 1024;
94 #endif
95 	gd->ram_size = size;
96 
97 	return 0;
98 }
99 
100 #if defined(CONFIG_SYS_DRAM_TEST)
101 int testdram (void)
102 {
103 	uint *pstart = (uint *) CONFIG_SYS_MEMTEST_START;
104 	uint *pend = (uint *) CONFIG_SYS_MEMTEST_END;
105 	uint *p;
106 
107 	printf("SDRAM test phase 1:\n");
108 	for (p = pstart; p < pend; p++)
109 		*p = 0xaaaaaaaa;
110 
111 	for (p = pstart; p < pend; p++) {
112 		if (*p != 0xaaaaaaaa) {
113 			printf ("SDRAM test fails at: %08x\n", (uint) p);
114 			return 1;
115 		}
116 	}
117 
118 	printf("SDRAM test phase 2:\n");
119 	for (p = pstart; p < pend; p++)
120 		*p = 0x55555555;
121 
122 	for (p = pstart; p < pend; p++) {
123 		if (*p != 0x55555555) {
124 			printf ("SDRAM test fails at: %08x\n", (uint) p);
125 			return 1;
126 		}
127 	}
128 
129 	printf("SDRAM test passed.\n");
130 	return 0;
131 }
132 #endif
133 
134 #if defined(CONFIG_HW_WATCHDOG)
135 
136 void hw_watchdog_init(void)
137 {
138 	char *s;
139 	int enable;
140 
141 	enable = 1;
142 	s = env_get("watchdog");
143 	if (s != NULL)
144 		if ((strncmp(s, "off", 3) == 0) || (strncmp(s, "0", 1) == 0))
145 			enable = 0;
146 	if (enable)
147 		MCFGPTA_GPTDDR  |= (1<<2);
148 	else
149 		MCFGPTA_GPTDDR  &= ~(1<<2);
150 }
151 
152 void hw_watchdog_reset(void)
153 {
154 	MCFGPTA_GPTPORT  ^= (1<<2);
155 }
156 #endif
157 
158 int misc_init_r(void)
159 {
160 #ifdef	CONFIG_HW_WATCHDOG
161 	hw_watchdog_init();
162 #endif
163 	return 1;
164 }
165 
166 void __led_toggle(led_id_t mask)
167 {
168 	MCFGPTA_GPTPORT ^= (1 << 3);
169 }
170 
171 void __led_init(led_id_t mask, int state)
172 {
173 	__led_set(mask, state);
174 	MCFGPTA_GPTDDR  |= (1 << 3);
175 }
176 
177 void __led_set(led_id_t mask, int state)
178 {
179 	if (state == CONFIG_LED_STATUS_ON)
180 		MCFGPTA_GPTPORT |= (1 << 3);
181 	else
182 		MCFGPTA_GPTPORT &= ~(1 << 3);
183 }
184 
185 #if defined(CONFIG_VIDEO)
186 
187 int drv_video_init(void)
188 {
189 	char *s;
190 #ifdef CONFIG_SPLASH_SCREEN
191 	unsigned long splash;
192 #endif
193 	printf("Init Video as ");
194 	s = env_get("displaywidth");
195 	if (s != NULL)
196 		display_width = simple_strtoul(s, NULL, 10);
197 	else
198 		display_width = 256;
199 
200 	s = env_get("displayheight");
201 	if (s != NULL)
202 		display_height = simple_strtoul(s, NULL, 10);
203 	else
204 		display_height = 256;
205 
206 	printf("%lu x %lu pixel matrix\n", display_width, display_height);
207 
208 	MCFCCM_CCR &= ~MCFCCM_CCR_SZEN;
209 	MCFGPIO_PEPAR &= ~MCFGPIO_PEPAR_PEPA2;
210 
211 	vcxk_init(display_width, display_height);
212 
213 #ifdef CONFIG_SPLASH_SCREEN
214 	s = env_get("splashimage");
215 	if (s != NULL) {
216 		splash = simple_strtoul(s, NULL, 16);
217 		vcxk_acknowledge_wait();
218 		video_display_bitmap(splash, 0, 0);
219 	}
220 #endif
221 	return 0;
222 }
223 #endif
224 
225 /*---------------------------------------------------------------------------*/
226 
227 #ifdef CONFIG_VIDEO
228 int do_brightness(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
229 {
230 	int rcode = 0;
231 	ulong side;
232 	ulong bright;
233 
234 	switch (argc) {
235 	case 3:
236 		side = simple_strtoul(argv[1], NULL, 10);
237 		bright = simple_strtoul(argv[2], NULL, 10);
238 		if ((side >= 0) && (side <= 3) &&
239 			(bright >= 0) && (bright <= 1000)) {
240 			vcxk_setbrightness(side, bright);
241 			rcode = 0;
242 		} else {
243 			printf("parameters out of range\n");
244 			printf("Usage:\n%s\n", cmdtp->usage);
245 			rcode = 1;
246 		}
247 		break;
248 	default:
249 		printf("Usage:\n%s\n", cmdtp->usage);
250 		rcode = 1;
251 		break;
252 	}
253 	return rcode;
254 }
255 
256 /*---------------------------------------------------------------------------*/
257 
258 U_BOOT_CMD(
259 	bright,	3,	0,	do_brightness,
260 	"sets the display brightness\n",
261 	" <side> <0..1000>\n        side: 0/3=both; 1=first; 2=second\n"
262 );
263 
264 #endif
265 
266 /* EOF EB+MCF-EV123.c */
267