1 /* 2 * (C) Copyright 2005-2009 3 * BuS Elektronik GmbH & Co.KG <esw@bus-elektonik.de> 4 * 5 * (C) Copyright 2000-2003 6 * Wolfgang Denk, DENX Software Engineering, wd@denx.de. 7 * 8 * SPDX-License-Identifier: GPL-2.0+ 9 */ 10 11 #include <common.h> 12 #include <command.h> 13 #include "asm/m5282.h" 14 #include <bmp_layout.h> 15 #include <status_led.h> 16 #include <bus_vcxk.h> 17 18 /*---------------------------------------------------------------------------*/ 19 20 DECLARE_GLOBAL_DATA_PTR; 21 22 #ifdef CONFIG_VIDEO 23 unsigned long display_width; 24 unsigned long display_height; 25 #endif 26 27 /*---------------------------------------------------------------------------*/ 28 29 int checkboard (void) 30 { 31 puts("Board: EB+CPU5282 (BuS Elektronik GmbH & Co. KG)\n"); 32 #if (CONFIG_SYS_TEXT_BASE == CONFIG_SYS_INT_FLASH_BASE) 33 puts(" Boot from Internal FLASH\n"); 34 #endif 35 return 0; 36 } 37 38 phys_size_t initdram (int board_type) 39 { 40 int size, i; 41 42 size = 0; 43 MCFSDRAMC_DCR = MCFSDRAMC_DCR_RTIM_6 | 44 MCFSDRAMC_DCR_RC((15 * CONFIG_SYS_CLK / 1000000) >> 4); 45 asm (" nop"); 46 #ifdef CONFIG_SYS_SDRAM_BASE0 47 MCFSDRAMC_DACR0 = MCFSDRAMC_DACR_BASE(CONFIG_SYS_SDRAM_BASE0)| 48 MCFSDRAMC_DACR_CASL(1) | MCFSDRAMC_DACR_CBM(3) | 49 MCFSDRAMC_DACR_PS_32; 50 asm (" nop"); 51 52 MCFSDRAMC_DMR0 = MCFSDRAMC_DMR_BAM_16M | MCFSDRAMC_DMR_V; 53 asm (" nop"); 54 55 MCFSDRAMC_DACR0 |= MCFSDRAMC_DACR_IP; 56 asm (" nop"); 57 for (i = 0; i < 10; i++) 58 asm (" nop"); 59 60 *(unsigned long *)(CONFIG_SYS_SDRAM_BASE0) = 0xA5A5A5A5; 61 asm (" nop"); 62 MCFSDRAMC_DACR0 |= MCFSDRAMC_DACR_RE; 63 asm (" nop"); 64 65 for (i = 0; i < 2000; i++) 66 asm (" nop"); 67 68 MCFSDRAMC_DACR0 |= MCFSDRAMC_DACR_IMRS; 69 asm (" nop"); 70 /* write SDRAM mode register */ 71 *(unsigned long *)(CONFIG_SYS_SDRAM_BASE0 + 0x80440) = 0xA5A5A5A5; 72 asm (" nop"); 73 size += CONFIG_SYS_SDRAM_SIZE0 * 1024 * 1024; 74 #endif 75 #ifdef CONFIG_SYS_SDRAM_BASE1xx 76 MCFSDRAMC_DACR1 = MCFSDRAMC_DACR_BASE (CONFIG_SYS_SDRAM_BASE1) 77 | MCFSDRAMC_DACR_CASL (1) 78 | MCFSDRAMC_DACR_CBM (3) 79 | MCFSDRAMC_DACR_PS_16; 80 81 MCFSDRAMC_DMR1 = MCFSDRAMC_DMR_BAM_16M | MCFSDRAMC_DMR_V; 82 83 MCFSDRAMC_DACR1 |= MCFSDRAMC_DACR_IP; 84 85 *(unsigned short *) (CONFIG_SYS_SDRAM_BASE1) = 0xA5A5; 86 MCFSDRAMC_DACR1 |= MCFSDRAMC_DACR_RE; 87 88 for (i = 0; i < 2000; i++) 89 asm (" nop"); 90 91 MCFSDRAMC_DACR1 |= MCFSDRAMC_DACR_IMRS; 92 *(unsigned int *) (CONFIG_SYS_SDRAM_BASE1 + 0x220) = 0xA5A5; 93 size += CONFIG_SYS_SDRAM_SIZE1 * 1024 * 1024; 94 #endif 95 return size; 96 } 97 98 #if defined(CONFIG_SYS_DRAM_TEST) 99 int testdram (void) 100 { 101 uint *pstart = (uint *) CONFIG_SYS_MEMTEST_START; 102 uint *pend = (uint *) CONFIG_SYS_MEMTEST_END; 103 uint *p; 104 105 printf("SDRAM test phase 1:\n"); 106 for (p = pstart; p < pend; p++) 107 *p = 0xaaaaaaaa; 108 109 for (p = pstart; p < pend; p++) { 110 if (*p != 0xaaaaaaaa) { 111 printf ("SDRAM test fails at: %08x\n", (uint) p); 112 return 1; 113 } 114 } 115 116 printf("SDRAM test phase 2:\n"); 117 for (p = pstart; p < pend; p++) 118 *p = 0x55555555; 119 120 for (p = pstart; p < pend; p++) { 121 if (*p != 0x55555555) { 122 printf ("SDRAM test fails at: %08x\n", (uint) p); 123 return 1; 124 } 125 } 126 127 printf("SDRAM test passed.\n"); 128 return 0; 129 } 130 #endif 131 132 #if defined(CONFIG_HW_WATCHDOG) 133 134 void hw_watchdog_init(void) 135 { 136 char *s; 137 int enable; 138 139 enable = 1; 140 s = getenv("watchdog"); 141 if (s != NULL) 142 if ((strncmp(s, "off", 3) == 0) || (strncmp(s, "0", 1) == 0)) 143 enable = 0; 144 if (enable) 145 MCFGPTA_GPTDDR |= (1<<2); 146 else 147 MCFGPTA_GPTDDR &= ~(1<<2); 148 } 149 150 void hw_watchdog_reset(void) 151 { 152 MCFGPTA_GPTPORT ^= (1<<2); 153 } 154 #endif 155 156 int misc_init_r(void) 157 { 158 #ifdef CONFIG_HW_WATCHDOG 159 hw_watchdog_init(); 160 #endif 161 return 1; 162 } 163 164 void __led_toggle(led_id_t mask) 165 { 166 MCFGPTA_GPTPORT ^= (1 << 3); 167 } 168 169 void __led_init(led_id_t mask, int state) 170 { 171 __led_set(mask, state); 172 MCFGPTA_GPTDDR |= (1 << 3); 173 } 174 175 void __led_set(led_id_t mask, int state) 176 { 177 if (state == STATUS_LED_ON) 178 MCFGPTA_GPTPORT |= (1 << 3); 179 else 180 MCFGPTA_GPTPORT &= ~(1 << 3); 181 } 182 183 #if defined(CONFIG_VIDEO) 184 185 int drv_video_init(void) 186 { 187 char *s; 188 #ifdef CONFIG_SPLASH_SCREEN 189 unsigned long splash; 190 #endif 191 printf("Init Video as "); 192 s = getenv("displaywidth"); 193 if (s != NULL) 194 display_width = simple_strtoul(s, NULL, 10); 195 else 196 display_width = 256; 197 198 s = getenv("displayheight"); 199 if (s != NULL) 200 display_height = simple_strtoul(s, NULL, 10); 201 else 202 display_height = 256; 203 204 printf("%lu x %lu pixel matrix\n", display_width, display_height); 205 206 MCFCCM_CCR &= ~MCFCCM_CCR_SZEN; 207 MCFGPIO_PEPAR &= ~MCFGPIO_PEPAR_PEPA2; 208 209 vcxk_init(display_width, display_height); 210 211 #ifdef CONFIG_SPLASH_SCREEN 212 s = getenv("splashimage"); 213 if (s != NULL) { 214 splash = simple_strtoul(s, NULL, 16); 215 vcxk_acknowledge_wait(); 216 video_display_bitmap(splash, 0, 0); 217 } 218 #endif 219 return 0; 220 } 221 #endif 222 223 /*---------------------------------------------------------------------------*/ 224 225 #ifdef CONFIG_VIDEO 226 int do_brightness(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) 227 { 228 int rcode = 0; 229 ulong side; 230 ulong bright; 231 232 switch (argc) { 233 case 3: 234 side = simple_strtoul(argv[1], NULL, 10); 235 bright = simple_strtoul(argv[2], NULL, 10); 236 if ((side >= 0) && (side <= 3) && 237 (bright >= 0) && (bright <= 1000)) { 238 vcxk_setbrightness(side, bright); 239 rcode = 0; 240 } else { 241 printf("parameters out of range\n"); 242 printf("Usage:\n%s\n", cmdtp->usage); 243 rcode = 1; 244 } 245 break; 246 default: 247 printf("Usage:\n%s\n", cmdtp->usage); 248 rcode = 1; 249 break; 250 } 251 return rcode; 252 } 253 254 /*---------------------------------------------------------------------------*/ 255 256 U_BOOT_CMD( 257 bright, 3, 0, do_brightness, 258 "sets the display brightness\n", 259 " <side> <0..1000>\n side: 0/3=both; 1=first; 2=second\n" 260 ); 261 262 #endif 263 264 /* EOF EB+MCF-EV123.c */ 265