xref: /openbmc/u-boot/board/BuR/common/common.c (revision ed36323f)
1 /*
2  * common.c
3  *
4  * common board functions for B&R boards
5  *
6  * Copyright (C) 2013 Hannes Petermaier <oe5hpm@oevsv.at>
7  * Bernecker & Rainer Industrieelektronik GmbH - http://www.br-automation.com
8  *
9  * SPDX-License-Identifier:	GPL-2.0+
10  *
11  */
12 
13 #include <common.h>
14 #include <errno.h>
15 #include <spl.h>
16 #include <asm/arch/cpu.h>
17 #include <asm/arch/hardware.h>
18 #include <asm/arch/omap.h>
19 #include <asm/arch/clock.h>
20 #include <asm/arch/gpio.h>
21 #include <asm/arch/sys_proto.h>
22 #include <asm/arch/mmc_host_def.h>
23 #include <asm/io.h>
24 #include <asm/gpio.h>
25 #include <i2c.h>
26 #include <miiphy.h>
27 #include <cpsw.h>
28 #include <power/tps65217.h>
29 #include "bur_common.h"
30 
31 static struct ctrl_dev *cdev = (struct ctrl_dev *)CTRL_DEVICE_BASE;
32 /* --------------------------------------------------------------------------*/
33 void blink(u32 blinks, u32 intervall, u32 pin)
34 {
35 	gpio_direction_output(pin, 0);
36 	int val = 0;
37 
38 	do {
39 		val ^= 0x01;
40 		gpio_set_value(pin, val);
41 		mdelay(intervall);
42 	} while (blinks--);
43 
44 	gpio_set_value(pin, 0);
45 }
46 #ifdef CONFIG_SPL_BUILD
47 void pmicsetup(u32 mpupll)
48 {
49 	int mpu_vdd;
50 	int usb_cur_lim;
51 
52 	/* setup I2C */
53 	enable_i2c0_pin_mux();
54 	i2c_init(CONFIG_SYS_OMAP24_I2C_SPEED, CONFIG_SYS_OMAP24_I2C_SLAVE);
55 
56 	if (i2c_probe(TPS65217_CHIP_PM)) {
57 		puts("PMIC (0x24) not found! skip further initalization.\n");
58 		return;
59 	}
60 
61 	/* Get the frequency which is defined by device fuses */
62 	dpll_mpu_opp100.m = am335x_get_efuse_mpu_max_freq(cdev);
63 	printf("detected max. frequency: %d - ", dpll_mpu_opp100.m);
64 
65 	if (0 != mpupll) {
66 		dpll_mpu_opp100.m = MPUPLL_M_1000;
67 		printf("retuning MPU-PLL to: %d MHz.\n", dpll_mpu_opp100.m);
68 	} else {
69 		puts("ok.\n");
70 	}
71 	/*
72 	 * Increase USB current limit to 1300mA or 1800mA and set
73 	 * the MPU voltage controller as needed.
74 	 */
75 	if (dpll_mpu_opp100.m == MPUPLL_M_1000) {
76 		usb_cur_lim = TPS65217_USB_INPUT_CUR_LIMIT_1800MA;
77 		mpu_vdd = TPS65217_DCDC_VOLT_SEL_1325MV;
78 	} else {
79 		usb_cur_lim = TPS65217_USB_INPUT_CUR_LIMIT_1300MA;
80 		mpu_vdd = TPS65217_DCDC_VOLT_SEL_1275MV;
81 	}
82 
83 	if (tps65217_reg_write(TPS65217_PROT_LEVEL_NONE, TPS65217_POWER_PATH,
84 			       usb_cur_lim, TPS65217_USB_INPUT_CUR_LIMIT_MASK))
85 		puts("tps65217_reg_write failure\n");
86 
87 	/* Set DCDC3 (CORE) voltage to 1.125V */
88 	if (tps65217_voltage_update(TPS65217_DEFDCDC3,
89 				    TPS65217_DCDC_VOLT_SEL_1125MV)) {
90 		puts("tps65217_voltage_update failure\n");
91 		return;
92 	}
93 
94 	/* Set CORE Frequencies to OPP100 */
95 	do_setup_dpll(&dpll_core_regs, &dpll_core_opp100);
96 
97 	/* Set DCDC2 (MPU) voltage */
98 	if (tps65217_voltage_update(TPS65217_DEFDCDC2, mpu_vdd)) {
99 		puts("tps65217_voltage_update failure\n");
100 		return;
101 	}
102 
103 	/* Set LDO3 to 1.8V */
104 	if (tps65217_reg_write(TPS65217_PROT_LEVEL_2,
105 			       TPS65217_DEFLS1,
106 			       TPS65217_LDO_VOLTAGE_OUT_1_8,
107 			       TPS65217_LDO_MASK))
108 		puts("tps65217_reg_write failure\n");
109 	/* Set LDO4 to 3.3V */
110 	if (tps65217_reg_write(TPS65217_PROT_LEVEL_2,
111 			       TPS65217_DEFLS2,
112 			       TPS65217_LDO_VOLTAGE_OUT_3_3,
113 			       TPS65217_LDO_MASK))
114 		puts("tps65217_reg_write failure\n");
115 
116 	/* Set MPU Frequency to what we detected now that voltages are set */
117 	do_setup_dpll(&dpll_mpu_regs, &dpll_mpu_opp100);
118 }
119 
120 void set_uart_mux_conf(void)
121 {
122 	enable_uart0_pin_mux();
123 }
124 
125 void set_mux_conf_regs(void)
126 {
127 	enable_board_pin_mux();
128 }
129 
130 #endif /* CONFIG_SPL_BUILD */
131 
132 #if (defined(CONFIG_DRIVER_TI_CPSW) && !defined(CONFIG_SPL_BUILD)) || \
133 	(defined(CONFIG_SPL_ETH_SUPPORT) && defined(CONFIG_SPL_BUILD))
134 static void cpsw_control(int enabled)
135 {
136 	/* VTP can be added here */
137 	return;
138 }
139 
140 /* describing port offsets of TI's CPSW block */
141 static struct cpsw_slave_data cpsw_slaves[] = {
142 	{
143 		.slave_reg_ofs	= 0x208,
144 		.sliver_reg_ofs	= 0xd80,
145 		.phy_addr	= 1,
146 	},
147 	{
148 		.slave_reg_ofs	= 0x308,
149 		.sliver_reg_ofs	= 0xdc0,
150 		.phy_addr	= 2,
151 	},
152 };
153 
154 static struct cpsw_platform_data cpsw_data = {
155 	.mdio_base		= CPSW_MDIO_BASE,
156 	.cpsw_base		= CPSW_BASE,
157 	.mdio_div		= 0xff,
158 	.channels		= 8,
159 	.cpdma_reg_ofs		= 0x800,
160 	.slaves			= 1,
161 	.slave_data		= cpsw_slaves,
162 	.ale_reg_ofs		= 0xd00,
163 	.ale_entries		= 1024,
164 	.host_port_reg_ofs	= 0x108,
165 	.hw_stats_reg_ofs	= 0x900,
166 	.bd_ram_ofs		= 0x2000,
167 	.mac_control		= (1 << 5),
168 	.control		= cpsw_control,
169 	.host_port_num		= 0,
170 	.version		= CPSW_CTRL_VERSION_2,
171 };
172 #endif /* CONFIG_DRIVER_TI_CPSW, ... */
173 
174 #if defined(CONFIG_DRIVER_TI_CPSW)
175 
176 int board_eth_init(bd_t *bis)
177 {
178 	int rv = 0;
179 	uint8_t mac_addr[6];
180 	uint32_t mac_hi, mac_lo;
181 
182 	/* try reading mac address from efuse */
183 	mac_lo = readl(&cdev->macid0l);
184 	mac_hi = readl(&cdev->macid0h);
185 	mac_addr[0] = mac_hi & 0xFF;
186 	mac_addr[1] = (mac_hi & 0xFF00) >> 8;
187 	mac_addr[2] = (mac_hi & 0xFF0000) >> 16;
188 	mac_addr[3] = (mac_hi & 0xFF000000) >> 24;
189 	mac_addr[4] = mac_lo & 0xFF;
190 	mac_addr[5] = (mac_lo & 0xFF00) >> 8;
191 
192 #if (defined(CONFIG_DRIVER_TI_CPSW) && !defined(CONFIG_SPL_BUILD)) || \
193 	(defined(CONFIG_SPL_ETH_SUPPORT) && defined(CONFIG_SPL_BUILD))
194 	if (!getenv("ethaddr")) {
195 		printf("<ethaddr> not set. Validating first E-fuse MAC ... ");
196 
197 		if (is_valid_ether_addr(mac_addr)) {
198 			printf("using: %02X:%02X:%02X:%02X:%02X:%02X.\n",
199 			       mac_addr[0], mac_addr[1], mac_addr[2],
200 			       mac_addr[3], mac_addr[4], mac_addr[5]
201 				);
202 			eth_setenv_enetaddr("ethaddr", mac_addr);
203 		}
204 	}
205 	writel(MII_MODE_ENABLE, &cdev->miisel);
206 	cpsw_slaves[0].phy_if = PHY_INTERFACE_MODE_MII;
207 	cpsw_slaves[1].phy_if =	PHY_INTERFACE_MODE_MII;
208 
209 	rv = cpsw_register(&cpsw_data);
210 	if (rv < 0) {
211 		printf("Error %d registering CPSW switch\n", rv);
212 		return 0;
213 	}
214 #endif /* CONFIG_DRIVER_TI_CPSW, ... */
215 	return rv;
216 }
217 #endif /* CONFIG_DRIVER_TI_CPSW */
218 #if defined(CONFIG_GENERIC_MMC) && !defined(CONFIG_SPL_BUILD)
219 int board_mmc_init(bd_t *bis)
220 {
221 	return omap_mmc_init(1, 0, 0, -1, -1);
222 }
223 #endif
224