xref: /openbmc/u-boot/board/BuR/common/common.c (revision 95963679)
1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3  * common.c
4  *
5  * common board functions for B&R boards
6  *
7  * Copyright (C) 2013 Hannes Schmelzer <oe5hpm@oevsv.at>
8  * Bernecker & Rainer Industrieelektronik GmbH - http://www.br-automation.com
9  *
10  */
11 #include <version.h>
12 #include <common.h>
13 #include <environment.h>
14 #include <errno.h>
15 #include <asm/arch/cpu.h>
16 #include <asm/arch/hardware.h>
17 #include <asm/arch/omap.h>
18 #include <asm/arch/clock.h>
19 #include <asm/arch/gpio.h>
20 #include <asm/arch/sys_proto.h>
21 #include <asm/arch/mmc_host_def.h>
22 #include <asm/io.h>
23 #include <asm/gpio.h>
24 #include <i2c.h>
25 #include <miiphy.h>
26 #include <cpsw.h>
27 #include <power/tps65217.h>
28 #include <lcd.h>
29 #include "bur_common.h"
30 #include "../../../drivers/video/am335x-fb.h"
31 
32 static struct ctrl_dev *cdev = (struct ctrl_dev *)CTRL_DEVICE_BASE;
33 
34 DECLARE_GLOBAL_DATA_PTR;
35 
36 /* --------------------------------------------------------------------------*/
37 #if defined(CONFIG_LCD) && defined(CONFIG_AM335X_LCD) && \
38 	!defined(CONFIG_SPL_BUILD)
39 void lcdbacklight(int on)
40 {
41 	unsigned int driver = env_get_ulong("ds1_bright_drv", 16, 0UL);
42 	unsigned int bright = env_get_ulong("ds1_bright_def", 10, 50);
43 	unsigned int pwmfrq = env_get_ulong("ds1_pwmfreq", 10, ~0UL);
44 	unsigned int tmp;
45 	struct gptimer *timerhw;
46 
47 	if (on)
48 		bright = bright != ~0UL ? bright : 50;
49 	else
50 		bright = 0;
51 
52 	switch (driver) {
53 	case 2:
54 		timerhw = (struct gptimer *)DM_TIMER5_BASE;
55 		break;
56 	default:
57 		timerhw = (struct gptimer *)DM_TIMER6_BASE;
58 	}
59 
60 	switch (driver) {
61 	case 0:	/* PMIC LED-Driver */
62 		/* brightness level */
63 		tps65217_reg_write(TPS65217_PROT_LEVEL_NONE,
64 				   TPS65217_WLEDCTRL2, bright, 0xFF);
65 		/* current sink */
66 		tps65217_reg_write(TPS65217_PROT_LEVEL_NONE,
67 				   TPS65217_WLEDCTRL1,
68 				   bright != 0 ? 0x0A : 0x02,
69 				   0xFF);
70 		break;
71 	case 1:
72 	case 2: /* PWM using timer */
73 		if (pwmfrq != ~0UL) {
74 			timerhw->tiocp_cfg = TCFG_RESET;
75 			udelay(10);
76 			while (timerhw->tiocp_cfg & TCFG_RESET)
77 				;
78 			tmp = ~0UL-(V_OSCK/pwmfrq);	/* bottom value */
79 			timerhw->tldr = tmp;
80 			timerhw->tcrr = tmp;
81 			tmp = tmp + ((V_OSCK/pwmfrq)/100) * bright;
82 			timerhw->tmar = tmp;
83 			timerhw->tclr = (TCLR_PT | (2 << TCLR_TRG_SHIFT) |
84 					TCLR_CE | TCLR_AR | TCLR_ST);
85 		} else {
86 			puts("invalid pwmfrq in env/dtb! skip PWM-setup.\n");
87 		}
88 		break;
89 	default:
90 		puts("no suitable backlightdriver in env/dtb!\n");
91 		break;
92 	}
93 }
94 
95 int load_lcdtiming(struct am335x_lcdpanel *panel)
96 {
97 	struct am335x_lcdpanel pnltmp;
98 
99 	pnltmp.hactive = env_get_ulong("ds1_hactive", 10, ~0UL);
100 	pnltmp.vactive = env_get_ulong("ds1_vactive", 10, ~0UL);
101 	pnltmp.bpp = env_get_ulong("ds1_bpp", 10, ~0UL);
102 	pnltmp.hfp = env_get_ulong("ds1_hfp", 10, ~0UL);
103 	pnltmp.hbp = env_get_ulong("ds1_hbp", 10, ~0UL);
104 	pnltmp.hsw = env_get_ulong("ds1_hsw", 10, ~0UL);
105 	pnltmp.vfp = env_get_ulong("ds1_vfp", 10, ~0UL);
106 	pnltmp.vbp = env_get_ulong("ds1_vbp", 10, ~0UL);
107 	pnltmp.vsw = env_get_ulong("ds1_vsw", 10, ~0UL);
108 	pnltmp.pxl_clk = env_get_ulong("ds1_pxlclk", 10, ~0UL);
109 	pnltmp.pol = env_get_ulong("ds1_pol", 16, ~0UL);
110 	pnltmp.pup_delay = env_get_ulong("ds1_pupdelay", 10, ~0UL);
111 	pnltmp.pon_delay = env_get_ulong("ds1_tondelay", 10, ~0UL);
112 	panel_info.vl_rot = env_get_ulong("ds1_rotation", 10, 0);
113 
114 	if (
115 	   ~0UL == (pnltmp.hactive) ||
116 	   ~0UL == (pnltmp.vactive) ||
117 	   ~0UL == (pnltmp.bpp) ||
118 	   ~0UL == (pnltmp.hfp) ||
119 	   ~0UL == (pnltmp.hbp) ||
120 	   ~0UL == (pnltmp.hsw) ||
121 	   ~0UL == (pnltmp.vfp) ||
122 	   ~0UL == (pnltmp.vbp) ||
123 	   ~0UL == (pnltmp.vsw) ||
124 	   ~0UL == (pnltmp.pxl_clk) ||
125 	   ~0UL == (pnltmp.pol) ||
126 	   ~0UL == (pnltmp.pup_delay) ||
127 	   ~0UL == (pnltmp.pon_delay)
128 	   ) {
129 		puts("lcd-settings in env/dtb incomplete!\n");
130 		printf("display-timings:\n"
131 			"================\n"
132 			"hactive: %d\n"
133 			"vactive: %d\n"
134 			"bpp    : %d\n"
135 			"hfp    : %d\n"
136 			"hbp    : %d\n"
137 			"hsw    : %d\n"
138 			"vfp    : %d\n"
139 			"vbp    : %d\n"
140 			"vsw    : %d\n"
141 			"pxlclk : %d\n"
142 			"pol    : 0x%08x\n"
143 			"pondly : %d\n",
144 			pnltmp.hactive, pnltmp.vactive, pnltmp.bpp,
145 			pnltmp.hfp, pnltmp.hbp, pnltmp.hsw,
146 			pnltmp.vfp, pnltmp.vbp, pnltmp.vsw,
147 			pnltmp.pxl_clk, pnltmp.pol, pnltmp.pon_delay);
148 
149 		return -1;
150 	}
151 	debug("lcd-settings in env complete, taking over.\n");
152 	memcpy((void *)panel,
153 	       (void *)&pnltmp,
154 	       sizeof(struct am335x_lcdpanel));
155 
156 	return 0;
157 }
158 
159 static void br_summaryscreen_printenv(char *prefix,
160 				       char *name, char *altname,
161 				       char *suffix)
162 {
163 	char *envval = env_get(name);
164 	if (0 != envval) {
165 		lcd_printf("%s %s %s", prefix, envval, suffix);
166 	} else if (0 != altname) {
167 		envval = env_get(altname);
168 		if (0 != envval)
169 			lcd_printf("%s %s %s", prefix, envval, suffix);
170 	} else {
171 		lcd_printf("\n");
172 	}
173 }
174 
175 void br_summaryscreen(void)
176 {
177 	br_summaryscreen_printenv(" - B&R -", "br_orderno", 0, "-\n");
178 	br_summaryscreen_printenv(" Serial/Rev :", "br_serial", 0, "\n");
179 	br_summaryscreen_printenv(" MAC (IF1)  :", "br_mac1", "ethaddr", "\n");
180 	br_summaryscreen_printenv(" MAC (IF2)  :", "br_mac2", 0, "\n");
181 	lcd_puts(" Bootloader : " PLAIN_VERSION "\n");
182 	lcd_puts("\n");
183 }
184 
185 void lcdpower(int on)
186 {
187 	u32 pin, swval, i;
188 
189 	pin = env_get_ulong("ds1_pwr", 16, ~0UL);
190 
191 	if (pin == ~0UL) {
192 		puts("no pwrpin in dtb/env, cannot powerup display!\n");
193 		return;
194 	}
195 
196 	for (i = 0; i < 3; i++) {
197 		if (pin != 0) {
198 			swval = pin & 0x80 ? 0 : 1;
199 			if (on)
200 				gpio_direction_output(pin & 0x7F, swval);
201 			else
202 				gpio_direction_output(pin & 0x7F, !swval);
203 
204 			debug("switched pin %d to %d\n", pin & 0x7F, swval);
205 		}
206 		pin >>= 8;
207 	}
208 }
209 
210 vidinfo_t	panel_info = {
211 		.vl_col = 1366,	/*
212 				 * give full resolution for allocating enough
213 				 * memory
214 				 */
215 		.vl_row = 768,
216 		.vl_bpix = 5,
217 		.priv = 0
218 };
219 
220 void lcd_ctrl_init(void *lcdbase)
221 {
222 	struct am335x_lcdpanel lcd_panel;
223 
224 	memset(&lcd_panel, 0, sizeof(struct am335x_lcdpanel));
225 	if (load_lcdtiming(&lcd_panel) != 0)
226 		return;
227 
228 	lcd_panel.panel_power_ctrl = &lcdpower;
229 
230 	if (0 != am335xfb_init(&lcd_panel))
231 		printf("ERROR: failed to initialize video!");
232 	/*
233 	 * modifiy panel info to 'real' resolution, to operate correct with
234 	 * lcd-framework.
235 	 */
236 	panel_info.vl_col = lcd_panel.hactive;
237 	panel_info.vl_row = lcd_panel.vactive;
238 
239 	lcd_set_flush_dcache(1);
240 }
241 
242 void lcd_enable(void)
243 {
244 	br_summaryscreen();
245 	lcdbacklight(1);
246 }
247 #endif /* CONFIG_LCD */
248 
249 int ft_board_setup(void *blob, bd_t *bd)
250 {
251 	int nodeoffset;
252 
253 	nodeoffset = fdt_path_offset(blob, "/factory-settings");
254 	if (nodeoffset < 0) {
255 		puts("set bootloader version 'factory-settings' not in dtb!\n");
256 		return -1;
257 	}
258 	if (fdt_setprop(blob, nodeoffset, "bl-version",
259 			PLAIN_VERSION, strlen(PLAIN_VERSION)) != 0) {
260 		puts("set bootloader version 'bl-version' prop. not in dtb!\n");
261 		return -1;
262 	}
263 
264 	return 0;
265 }
266 
267 #ifdef CONFIG_SPL_BUILD
268 void pmicsetup(u32 mpupll)
269 {
270 	int mpu_vdd;
271 	int usb_cur_lim;
272 
273 	if (i2c_probe(TPS65217_CHIP_PM)) {
274 		puts("PMIC (0x24) not found! skip further initalization.\n");
275 		return;
276 	}
277 
278 	/* Get the frequency which is defined by device fuses */
279 	dpll_mpu_opp100.m = am335x_get_efuse_mpu_max_freq(cdev);
280 	printf("detected max. frequency: %d - ", dpll_mpu_opp100.m);
281 
282 	if (0 != mpupll) {
283 		dpll_mpu_opp100.m = MPUPLL_M_1000;
284 		printf("retuning MPU-PLL to: %d MHz.\n", dpll_mpu_opp100.m);
285 	} else {
286 		puts("ok.\n");
287 	}
288 	/*
289 	 * Increase USB current limit to 1300mA or 1800mA and set
290 	 * the MPU voltage controller as needed.
291 	 */
292 	if (dpll_mpu_opp100.m == MPUPLL_M_1000) {
293 		usb_cur_lim = TPS65217_USB_INPUT_CUR_LIMIT_1800MA;
294 		mpu_vdd = TPS65217_DCDC_VOLT_SEL_1325MV;
295 	} else {
296 		usb_cur_lim = TPS65217_USB_INPUT_CUR_LIMIT_1300MA;
297 		mpu_vdd = TPS65217_DCDC_VOLT_SEL_1275MV;
298 	}
299 
300 	if (tps65217_reg_write(TPS65217_PROT_LEVEL_NONE, TPS65217_POWER_PATH,
301 			       usb_cur_lim, TPS65217_USB_INPUT_CUR_LIMIT_MASK))
302 		puts("tps65217_reg_write failure\n");
303 
304 	/* Set DCDC3 (CORE) voltage to 1.125V */
305 	if (tps65217_voltage_update(TPS65217_DEFDCDC3,
306 				    TPS65217_DCDC_VOLT_SEL_1125MV)) {
307 		puts("tps65217_voltage_update failure\n");
308 		return;
309 	}
310 
311 	/* Set CORE Frequencies to OPP100 */
312 	do_setup_dpll(&dpll_core_regs, &dpll_core_opp100);
313 
314 	/* Set DCDC2 (MPU) voltage */
315 	if (tps65217_voltage_update(TPS65217_DEFDCDC2, mpu_vdd)) {
316 		puts("tps65217_voltage_update failure\n");
317 		return;
318 	}
319 
320 	/* Set LDO3 to 1.8V */
321 	if (tps65217_reg_write(TPS65217_PROT_LEVEL_2,
322 			       TPS65217_DEFLS1,
323 			       TPS65217_LDO_VOLTAGE_OUT_1_8,
324 			       TPS65217_LDO_MASK))
325 		puts("tps65217_reg_write failure\n");
326 	/* Set LDO4 to 3.3V */
327 	if (tps65217_reg_write(TPS65217_PROT_LEVEL_2,
328 			       TPS65217_DEFLS2,
329 			       TPS65217_LDO_VOLTAGE_OUT_3_3,
330 			       TPS65217_LDO_MASK))
331 		puts("tps65217_reg_write failure\n");
332 
333 	/* Set MPU Frequency to what we detected now that voltages are set */
334 	do_setup_dpll(&dpll_mpu_regs, &dpll_mpu_opp100);
335 	/* Set PWR_EN bit in Status Register */
336 	tps65217_reg_write(TPS65217_PROT_LEVEL_NONE,
337 			   TPS65217_STATUS, TPS65217_PWR_OFF, TPS65217_PWR_OFF);
338 }
339 
340 void set_uart_mux_conf(void)
341 {
342 	enable_uart0_pin_mux();
343 }
344 
345 void set_mux_conf_regs(void)
346 {
347 	enable_board_pin_mux();
348 }
349 
350 #endif /* CONFIG_SPL_BUILD */
351 
352 #if (defined(CONFIG_DRIVER_TI_CPSW) && !defined(CONFIG_SPL_BUILD)) || \
353 	(defined(CONFIG_SPL_ETH_SUPPORT) && defined(CONFIG_SPL_BUILD))
354 static void cpsw_control(int enabled)
355 {
356 	/* VTP can be added here */
357 	return;
358 }
359 
360 /* describing port offsets of TI's CPSW block */
361 static struct cpsw_slave_data cpsw_slaves[] = {
362 	{
363 		.slave_reg_ofs	= 0x208,
364 		.sliver_reg_ofs	= 0xd80,
365 		.phy_addr	= 1,
366 	},
367 	{
368 		.slave_reg_ofs	= 0x308,
369 		.sliver_reg_ofs	= 0xdc0,
370 		.phy_addr	= 2,
371 	},
372 };
373 
374 static struct cpsw_platform_data cpsw_data = {
375 	.mdio_base		= CPSW_MDIO_BASE,
376 	.cpsw_base		= CPSW_BASE,
377 	.mdio_div		= 0xff,
378 	.channels		= 8,
379 	.cpdma_reg_ofs		= 0x800,
380 	.slaves			= 1,
381 	.slave_data		= cpsw_slaves,
382 	.ale_reg_ofs		= 0xd00,
383 	.ale_entries		= 1024,
384 	.host_port_reg_ofs	= 0x108,
385 	.hw_stats_reg_ofs	= 0x900,
386 	.bd_ram_ofs		= 0x2000,
387 	.mac_control		= (1 << 5),
388 	.control		= cpsw_control,
389 	.host_port_num		= 0,
390 	.version		= CPSW_CTRL_VERSION_2,
391 };
392 #endif /* CONFIG_DRIVER_TI_CPSW, ... */
393 
394 #if defined(CONFIG_DRIVER_TI_CPSW) && !defined(CONFIG_SPL_BUILD)
395 int board_eth_init(bd_t *bis)
396 {
397 	int rv = 0;
398 	char mac_addr[6];
399 	const char *mac = 0;
400 	uint32_t mac_hi, mac_lo;
401 	/* try reading mac address from efuse */
402 	mac_lo = readl(&cdev->macid0l);
403 	mac_hi = readl(&cdev->macid0h);
404 	mac_addr[0] = mac_hi & 0xFF;
405 	mac_addr[1] = (mac_hi & 0xFF00) >> 8;
406 	mac_addr[2] = (mac_hi & 0xFF0000) >> 16;
407 	mac_addr[3] = (mac_hi & 0xFF000000) >> 24;
408 	mac_addr[4] = mac_lo & 0xFF;
409 	mac_addr[5] = (mac_lo & 0xFF00) >> 8;
410 
411 	if (!env_get("ethaddr")) {
412 		if (!mac) {
413 			printf("<ethaddr> not set. validating E-fuse MAC ... ");
414 			if (is_valid_ethaddr((const u8 *)mac_addr))
415 				mac = (const char *)mac_addr;
416 		}
417 
418 		if (mac) {
419 			printf("using: %pM on ", mac);
420 			eth_env_set_enetaddr("ethaddr", (const u8 *)mac);
421 		}
422 	}
423 	writel(MII_MODE_ENABLE, &cdev->miisel);
424 	cpsw_slaves[0].phy_if = PHY_INTERFACE_MODE_MII;
425 	cpsw_slaves[1].phy_if =	PHY_INTERFACE_MODE_MII;
426 
427 	rv = cpsw_register(&cpsw_data);
428 	if (rv < 0) {
429 		printf("Error %d registering CPSW switch\n", rv);
430 		return 0;
431 	}
432 	return rv;
433 }
434 #endif /* defined(CONFIG_DRIVER_TI_CPSW) && !defined(CONFIG_SPL_BUILD) */
435 #if defined(CONFIG_MMC)
436 int board_mmc_init(bd_t *bis)
437 {
438 	int rc = 0;
439 
440 	rc |= omap_mmc_init(0, 0, 0, -1, -1);
441 	rc |= omap_mmc_init(1, 0, 0, -1, -1);
442 
443 	return rc;
444 }
445 #endif
446 int overwrite_console(void)
447 {
448 	return 1;
449 }
450