1 /* 2 * common.c 3 * 4 * common board functions for B&R boards 5 * 6 * Copyright (C) 2013 Hannes Petermaier <oe5hpm@oevsv.at> 7 * Bernecker & Rainer Industrieelektronik GmbH - http://www.br-automation.com 8 * 9 * SPDX-License-Identifier: GPL-2.0+ 10 * 11 */ 12 #include <version.h> 13 #include <common.h> 14 #include <errno.h> 15 #include <spl.h> 16 #include <asm/arch/cpu.h> 17 #include <asm/arch/hardware.h> 18 #include <asm/arch/omap.h> 19 #include <asm/arch/clock.h> 20 #include <asm/arch/gpio.h> 21 #include <asm/arch/sys_proto.h> 22 #include <asm/arch/mmc_host_def.h> 23 #include <asm/io.h> 24 #include <asm/gpio.h> 25 #include <i2c.h> 26 #include <miiphy.h> 27 #include <cpsw.h> 28 #include <power/tps65217.h> 29 #include <lcd.h> 30 #include <fs.h> 31 #ifdef CONFIG_USE_FDT 32 #include <fdt_support.h> 33 #endif 34 #include "bur_common.h" 35 #include "../../../drivers/video/am335x-fb.h" 36 #include <nand.h> 37 38 static struct ctrl_dev *cdev = (struct ctrl_dev *)CTRL_DEVICE_BASE; 39 40 DECLARE_GLOBAL_DATA_PTR; 41 42 #ifdef CONFIG_USE_FDT 43 #define FDTPROP(b, c) fdt_getprop_u32_default(gd->fdt_blob, b, c, ~0UL) 44 #define PATHTIM "/panel/display-timings/default" 45 #define PATHINF "/panel/panel-info" 46 #endif 47 /* --------------------------------------------------------------------------*/ 48 #if defined(CONFIG_LCD) && defined(CONFIG_AM335X_LCD) && \ 49 !defined(CONFIG_SPL_BUILD) 50 int load_lcdtiming(struct am335x_lcdpanel *panel) 51 { 52 struct am335x_lcdpanel pnltmp; 53 #ifdef CONFIG_USE_FDT 54 u32 dtbprop; 55 56 if (gd->fdt_blob == NULL) { 57 printf("%s: don't have a valid gd->fdt_blob!\n", __func__); 58 return -1; 59 } 60 memcpy(&pnltmp, (void *)panel, sizeof(struct am335x_lcdpanel)); 61 62 pnltmp.hactive = FDTPROP(PATHTIM, "hactive"); 63 pnltmp.vactive = FDTPROP(PATHTIM, "vactive"); 64 pnltmp.bpp = FDTPROP(PATHINF, "bpp"); 65 pnltmp.hfp = FDTPROP(PATHTIM, "hfront-porch"); 66 pnltmp.hbp = FDTPROP(PATHTIM, "hback-porch"); 67 pnltmp.hsw = FDTPROP(PATHTIM, "hsync-len"); 68 pnltmp.vfp = FDTPROP(PATHTIM, "vfront-porch"); 69 pnltmp.vbp = FDTPROP(PATHTIM, "vback-porch"); 70 pnltmp.vsw = FDTPROP(PATHTIM, "vsync-len"); 71 pnltmp.pup_delay = FDTPROP(PATHTIM, "pupdelay"); 72 pnltmp.pon_delay = FDTPROP(PATHTIM, "pondelay"); 73 74 /* calc. proper clk-divisor */ 75 dtbprop = FDTPROP(PATHTIM, "clock-frequency"); 76 if (dtbprop != ~0UL) 77 pnltmp.pxl_clk_div = 192000000 / dtbprop; 78 else 79 pnltmp.pxl_clk_div = ~0UL; 80 81 /* check polarity of control-signals */ 82 dtbprop = FDTPROP(PATHTIM, "hsync-active"); 83 if (dtbprop == 0) 84 pnltmp.pol |= HSYNC_INVERT; 85 dtbprop = FDTPROP(PATHTIM, "vsync-active"); 86 if (dtbprop == 0) 87 pnltmp.pol |= VSYNC_INVERT; 88 dtbprop = FDTPROP(PATHINF, "sync-ctrl"); 89 if (dtbprop == 1) 90 pnltmp.pol |= HSVS_CONTROL; 91 dtbprop = FDTPROP(PATHINF, "sync-edge"); 92 if (dtbprop == 1) 93 pnltmp.pol |= HSVS_RISEFALL; 94 dtbprop = FDTPROP(PATHTIM, "pixelclk-active"); 95 if (dtbprop == 0) 96 pnltmp.pol |= PXCLK_INVERT; 97 dtbprop = FDTPROP(PATHTIM, "de-active"); 98 if (dtbprop == 0) 99 pnltmp.pol |= DE_INVERT; 100 #else 101 pnltmp.hactive = getenv_ulong("ds1_hactive", 10, ~0UL); 102 pnltmp.vactive = getenv_ulong("ds1_vactive", 10, ~0UL); 103 pnltmp.bpp = getenv_ulong("ds1_bpp", 10, ~0UL); 104 pnltmp.hfp = getenv_ulong("ds1_hfp", 10, ~0UL); 105 pnltmp.hbp = getenv_ulong("ds1_hbp", 10, ~0UL); 106 pnltmp.hsw = getenv_ulong("ds1_hsw", 10, ~0UL); 107 pnltmp.vfp = getenv_ulong("ds1_vfp", 10, ~0UL); 108 pnltmp.vbp = getenv_ulong("ds1_vbp", 10, ~0UL); 109 pnltmp.vsw = getenv_ulong("ds1_vsw", 10, ~0UL); 110 pnltmp.pxl_clk_div = getenv_ulong("ds1_pxlclkdiv", 10, ~0UL); 111 pnltmp.pol = getenv_ulong("ds1_pol", 16, ~0UL); 112 pnltmp.pup_delay = getenv_ulong("ds1_pupdelay", 10, ~0UL); 113 pnltmp.pon_delay = getenv_ulong("ds1_tondelay", 10, ~0UL); 114 #endif 115 if ( 116 ~0UL == (pnltmp.hactive) || 117 ~0UL == (pnltmp.vactive) || 118 ~0UL == (pnltmp.bpp) || 119 ~0UL == (pnltmp.hfp) || 120 ~0UL == (pnltmp.hbp) || 121 ~0UL == (pnltmp.hsw) || 122 ~0UL == (pnltmp.vfp) || 123 ~0UL == (pnltmp.vbp) || 124 ~0UL == (pnltmp.vsw) || 125 ~0UL == (pnltmp.pxl_clk_div) || 126 ~0UL == (pnltmp.pol) || 127 ~0UL == (pnltmp.pup_delay) || 128 ~0UL == (pnltmp.pon_delay) 129 ) { 130 puts("lcd-settings in env/dtb incomplete!\n"); 131 printf("display-timings:\n" 132 "================\n" 133 "hactive: %d\n" 134 "vactive: %d\n" 135 "bpp : %d\n" 136 "hfp : %d\n" 137 "hbp : %d\n" 138 "hsw : %d\n" 139 "vfp : %d\n" 140 "vbp : %d\n" 141 "vsw : %d\n" 142 "pxlclk : %d\n" 143 "pol : 0x%08x\n" 144 "pondly : %d\n", 145 pnltmp.hactive, pnltmp.vactive, pnltmp.bpp, 146 pnltmp.hfp, pnltmp.hbp, pnltmp.hsw, 147 pnltmp.vfp, pnltmp.vbp, pnltmp.vsw, 148 pnltmp.pxl_clk_div, pnltmp.pol, pnltmp.pon_delay); 149 150 return -1; 151 } 152 debug("lcd-settings in env complete, taking over.\n"); 153 memcpy((void *)panel, 154 (void *)&pnltmp, 155 sizeof(struct am335x_lcdpanel)); 156 157 return 0; 158 } 159 160 #ifdef CONFIG_USE_FDT 161 static int load_devicetree(void) 162 { 163 int rc; 164 loff_t dtbsize; 165 u32 dtbaddr = getenv_ulong("dtbaddr", 16, 0UL); 166 167 if (dtbaddr == 0) { 168 printf("%s: don't have a valid <dtbaddr> in env!\n", __func__); 169 return -1; 170 } 171 #ifdef CONFIG_NAND 172 dtbsize = 0x20000; 173 rc = nand_read_skip_bad(&nand_info[0], 0x40000, (size_t *)&dtbsize, 174 NULL, 0x20000, (u_char *)dtbaddr); 175 #else 176 char *dtbname = getenv("dtb"); 177 char *dtbdev = getenv("dtbdev"); 178 char *dtppart = getenv("dtbpart"); 179 if (!dtbdev || !dtbdev || !dtbname) { 180 printf("%s: <dtbdev>/<dtbpart>/<dtb> missing.\n", __func__); 181 return -1; 182 } 183 184 if (fs_set_blk_dev(dtbdev, dtppart, FS_TYPE_EXT)) { 185 puts("load_devicetree: set_blk_dev failed.\n"); 186 return -1; 187 } 188 rc = fs_read(dtbname, (u32)dtbaddr, 0, 0, &dtbsize); 189 #endif 190 if (rc == 0) { 191 gd->fdt_blob = (void *)dtbaddr; 192 gd->fdt_size = dtbsize; 193 debug("loaded %d bytes of dtb onto 0x%08x\n", 194 (u32)dtbsize, (u32)gd->fdt_blob); 195 return dtbsize; 196 } 197 198 printf("%s: load dtb failed!\n", __func__); 199 return -1; 200 } 201 202 static const char *dtbmacaddr(u32 ifno) 203 { 204 int node, len; 205 char enet[16]; 206 const char *mac; 207 const char *path; 208 209 if (gd->fdt_blob == NULL) { 210 printf("%s: don't have a valid gd->fdt_blob!\n", __func__); 211 return NULL; 212 } 213 214 node = fdt_path_offset(gd->fdt_blob, "/aliases"); 215 if (node < 0) 216 return NULL; 217 218 sprintf(enet, "ethernet%d", ifno); 219 path = fdt_getprop(gd->fdt_blob, node, enet, NULL); 220 if (!path) { 221 printf("no alias for %s\n", enet); 222 return NULL; 223 } 224 225 node = fdt_path_offset(gd->fdt_blob, path); 226 mac = fdt_getprop(gd->fdt_blob, node, "mac-address", &len); 227 if (mac && is_valid_ethaddr((u8 *)mac)) 228 return mac; 229 230 return NULL; 231 } 232 233 static void br_summaryscreen_printdtb(char *prefix, 234 char *name, 235 char *suffix) 236 { 237 char buf[32] = { 0 }; 238 const char *nodep = buf; 239 char *mac = 0; 240 int nodeoffset; 241 int len; 242 243 if (gd->fdt_blob == NULL) { 244 printf("%s: don't have a valid gd->fdt_blob!\n", __func__); 245 return; 246 } 247 248 if (strcmp(name, "brmac1") == 0) { 249 mac = (char *)dtbmacaddr(0); 250 if (mac) 251 sprintf(buf, "%pM", mac); 252 } else if (strcmp(name, "brmac2") == 0) { 253 mac = (char *)dtbmacaddr(1); 254 if (mac) 255 sprintf(buf, "%pM", mac); 256 } else { 257 nodeoffset = fdt_path_offset(gd->fdt_blob, 258 "/factory-settings"); 259 if (nodeoffset < 0) { 260 puts("no 'factory-settings' in dtb!\n"); 261 return; 262 } 263 nodep = fdt_getprop(gd->fdt_blob, nodeoffset, name, &len); 264 } 265 if (nodep && strlen(nodep) > 1) 266 lcd_printf("%s %s %s", prefix, nodep, suffix); 267 else 268 lcd_printf("\n"); 269 } 270 int ft_board_setup(void *blob, bd_t *bd) 271 { 272 int nodeoffset; 273 274 nodeoffset = fdt_path_offset(blob, "/factory-settings"); 275 if (nodeoffset < 0) { 276 puts("set bootloader version 'factory-settings' not in dtb!\n"); 277 return -1; 278 } 279 if (fdt_setprop(blob, nodeoffset, "bl-version", 280 PLAIN_VERSION, strlen(PLAIN_VERSION)) != 0) { 281 puts("set bootloader version 'bl-version' prop. not in dtb!\n"); 282 return -1; 283 } 284 return 0; 285 } 286 #else 287 288 static void br_summaryscreen_printenv(char *prefix, 289 char *name, char *altname, 290 char *suffix) 291 { 292 char *envval = getenv(name); 293 if (0 != envval) { 294 lcd_printf("%s %s %s", prefix, envval, suffix); 295 } else if (0 != altname) { 296 envval = getenv(altname); 297 if (0 != envval) 298 lcd_printf("%s %s %s", prefix, envval, suffix); 299 } else { 300 lcd_printf("\n"); 301 } 302 } 303 #endif 304 void br_summaryscreen(void) 305 { 306 #ifdef CONFIG_USE_FDT 307 br_summaryscreen_printdtb(" - B&R -", "order-no", "-\n"); 308 br_summaryscreen_printdtb(" Serial/Rev :", "serial-no", " /"); 309 br_summaryscreen_printdtb(" ", "hw-revision", "\n"); 310 br_summaryscreen_printdtb(" MAC (IF1) :", "brmac1", "\n"); 311 br_summaryscreen_printdtb(" MAC (IF2) :", "brmac2", "\n"); 312 lcd_puts(" Bootloader : " PLAIN_VERSION "\n"); 313 lcd_puts("\n"); 314 #else 315 br_summaryscreen_printenv(" - B&R -", "br_orderno", 0, "-\n"); 316 br_summaryscreen_printenv(" Serial/Rev :", "br_serial", 0, "\n"); 317 br_summaryscreen_printenv(" MAC (IF1) :", "br_mac1", "ethaddr", "\n"); 318 br_summaryscreen_printenv(" MAC (IF2) :", "br_mac2", 0, "\n"); 319 lcd_puts(" Bootloader : " PLAIN_VERSION "\n"); 320 lcd_puts("\n"); 321 #endif 322 } 323 324 void lcdpower(int on) 325 { 326 u32 pin, swval, i; 327 #ifdef CONFIG_USE_FDT 328 if (gd->fdt_blob == NULL) { 329 printf("%s: don't have a valid gd->fdt_blob!\n", __func__); 330 return; 331 } 332 pin = FDTPROP(PATHINF, "pwrpin"); 333 #else 334 pin = getenv_ulong("ds1_pwr", 16, ~0UL); 335 #endif 336 if (pin == ~0UL) { 337 puts("no pwrpin in dtb/env, cannot powerup display!\n"); 338 return; 339 } 340 341 for (i = 0; i < 3; i++) { 342 if (pin != 0) { 343 swval = pin & 0x80 ? 0 : 1; 344 if (on) 345 gpio_direction_output(pin & 0x7F, swval); 346 else 347 gpio_direction_output(pin & 0x7F, !swval); 348 349 debug("switched pin %d to %d\n", pin & 0x7F, swval); 350 } 351 pin >>= 8; 352 } 353 } 354 355 vidinfo_t panel_info = { 356 .vl_col = 1366, /* 357 * give full resolution for allocating enough 358 * memory 359 */ 360 .vl_row = 768, 361 .vl_bpix = 5, 362 .priv = 0 363 }; 364 365 void lcd_ctrl_init(void *lcdbase) 366 { 367 struct am335x_lcdpanel lcd_panel; 368 #ifdef CONFIG_USE_FDT 369 /* TODO: is there a better place to load the dtb ? */ 370 load_devicetree(); 371 #endif 372 memset(&lcd_panel, 0, sizeof(struct am335x_lcdpanel)); 373 if (load_lcdtiming(&lcd_panel) != 0) 374 return; 375 376 lcd_panel.panel_power_ctrl = &lcdpower; 377 378 if (0 != am335xfb_init(&lcd_panel)) 379 printf("ERROR: failed to initialize video!"); 380 /* 381 * modifiy panel info to 'real' resolution, to operate correct with 382 * lcd-framework. 383 */ 384 panel_info.vl_col = lcd_panel.hactive; 385 panel_info.vl_row = lcd_panel.vactive; 386 387 lcd_set_flush_dcache(1); 388 } 389 390 void lcd_enable(void) 391 { 392 #ifdef CONFIG_USE_FDT 393 if (gd->fdt_blob == NULL) { 394 printf("%s: don't have a valid gd->fdt_blob!\n", __func__); 395 return; 396 } 397 unsigned int driver = FDTPROP(PATHINF, "brightdrv"); 398 unsigned int bright = FDTPROP(PATHINF, "brightdef"); 399 unsigned int pwmfrq = FDTPROP(PATHINF, "brightfdim"); 400 #else 401 unsigned int driver = getenv_ulong("ds1_bright_drv", 16, 0UL); 402 unsigned int bright = getenv_ulong("ds1_bright_def", 10, 50); 403 unsigned int pwmfrq = getenv_ulong("ds1_pwmfreq", 10, ~0UL); 404 #endif 405 unsigned int tmp; 406 struct gptimer *const timerhw = (struct gptimer *)DM_TIMER6_BASE; 407 408 bright = bright != ~0UL ? bright : 50; 409 410 switch (driver) { 411 case 0: /* PMIC LED-Driver */ 412 /* brightness level */ 413 tps65217_reg_write(TPS65217_PROT_LEVEL_NONE, 414 TPS65217_WLEDCTRL2, bright, 0xFF); 415 /* turn on light */ 416 tps65217_reg_write(TPS65217_PROT_LEVEL_NONE, 417 TPS65217_WLEDCTRL1, 0x0A, 0xFF); 418 break; 419 case 1: /* PWM using timer6 */ 420 if (pwmfrq != ~0UL) { 421 timerhw->tiocp_cfg = TCFG_RESET; 422 udelay(10); 423 while (timerhw->tiocp_cfg & TCFG_RESET) 424 ; 425 tmp = ~0UL-(V_OSCK/pwmfrq); /* bottom value */ 426 timerhw->tldr = tmp; 427 timerhw->tcrr = tmp; 428 tmp = tmp + ((V_OSCK/pwmfrq)/100) * bright; 429 timerhw->tmar = tmp; 430 timerhw->tclr = (TCLR_PT | (2 << TCLR_TRG_SHIFT) | 431 TCLR_CE | TCLR_AR | TCLR_ST); 432 } else { 433 puts("invalid pwmfrq in env/dtb! skip PWM-setup.\n"); 434 } 435 break; 436 default: 437 puts("no suitable backlightdriver in env/dtb!\n"); 438 break; 439 } 440 br_summaryscreen(); 441 } 442 #elif CONFIG_SPL_BUILD 443 #else 444 #error "LCD-support with a suitable FB-Driver is mandatory !" 445 #endif /* CONFIG_LCD */ 446 447 #ifdef CONFIG_SPL_BUILD 448 void pmicsetup(u32 mpupll) 449 { 450 int mpu_vdd; 451 int usb_cur_lim; 452 453 if (i2c_probe(TPS65217_CHIP_PM)) { 454 puts("PMIC (0x24) not found! skip further initalization.\n"); 455 return; 456 } 457 458 /* Get the frequency which is defined by device fuses */ 459 dpll_mpu_opp100.m = am335x_get_efuse_mpu_max_freq(cdev); 460 printf("detected max. frequency: %d - ", dpll_mpu_opp100.m); 461 462 if (0 != mpupll) { 463 dpll_mpu_opp100.m = MPUPLL_M_1000; 464 printf("retuning MPU-PLL to: %d MHz.\n", dpll_mpu_opp100.m); 465 } else { 466 puts("ok.\n"); 467 } 468 /* 469 * Increase USB current limit to 1300mA or 1800mA and set 470 * the MPU voltage controller as needed. 471 */ 472 if (dpll_mpu_opp100.m == MPUPLL_M_1000) { 473 usb_cur_lim = TPS65217_USB_INPUT_CUR_LIMIT_1800MA; 474 mpu_vdd = TPS65217_DCDC_VOLT_SEL_1325MV; 475 } else { 476 usb_cur_lim = TPS65217_USB_INPUT_CUR_LIMIT_1300MA; 477 mpu_vdd = TPS65217_DCDC_VOLT_SEL_1275MV; 478 } 479 480 if (tps65217_reg_write(TPS65217_PROT_LEVEL_NONE, TPS65217_POWER_PATH, 481 usb_cur_lim, TPS65217_USB_INPUT_CUR_LIMIT_MASK)) 482 puts("tps65217_reg_write failure\n"); 483 484 /* Set DCDC3 (CORE) voltage to 1.125V */ 485 if (tps65217_voltage_update(TPS65217_DEFDCDC3, 486 TPS65217_DCDC_VOLT_SEL_1125MV)) { 487 puts("tps65217_voltage_update failure\n"); 488 return; 489 } 490 491 /* Set CORE Frequencies to OPP100 */ 492 do_setup_dpll(&dpll_core_regs, &dpll_core_opp100); 493 494 /* Set DCDC2 (MPU) voltage */ 495 if (tps65217_voltage_update(TPS65217_DEFDCDC2, mpu_vdd)) { 496 puts("tps65217_voltage_update failure\n"); 497 return; 498 } 499 500 /* Set LDO3 to 1.8V */ 501 if (tps65217_reg_write(TPS65217_PROT_LEVEL_2, 502 TPS65217_DEFLS1, 503 TPS65217_LDO_VOLTAGE_OUT_1_8, 504 TPS65217_LDO_MASK)) 505 puts("tps65217_reg_write failure\n"); 506 /* Set LDO4 to 3.3V */ 507 if (tps65217_reg_write(TPS65217_PROT_LEVEL_2, 508 TPS65217_DEFLS2, 509 TPS65217_LDO_VOLTAGE_OUT_3_3, 510 TPS65217_LDO_MASK)) 511 puts("tps65217_reg_write failure\n"); 512 513 /* Set MPU Frequency to what we detected now that voltages are set */ 514 do_setup_dpll(&dpll_mpu_regs, &dpll_mpu_opp100); 515 /* Set PWR_EN bit in Status Register */ 516 tps65217_reg_write(TPS65217_PROT_LEVEL_NONE, 517 TPS65217_STATUS, TPS65217_PWR_OFF, TPS65217_PWR_OFF); 518 } 519 520 void set_uart_mux_conf(void) 521 { 522 enable_uart0_pin_mux(); 523 } 524 525 void set_mux_conf_regs(void) 526 { 527 enable_board_pin_mux(); 528 } 529 530 #endif /* CONFIG_SPL_BUILD */ 531 532 #if (defined(CONFIG_DRIVER_TI_CPSW) && !defined(CONFIG_SPL_BUILD)) || \ 533 (defined(CONFIG_SPL_ETH_SUPPORT) && defined(CONFIG_SPL_BUILD)) 534 static void cpsw_control(int enabled) 535 { 536 /* VTP can be added here */ 537 return; 538 } 539 540 /* describing port offsets of TI's CPSW block */ 541 static struct cpsw_slave_data cpsw_slaves[] = { 542 { 543 .slave_reg_ofs = 0x208, 544 .sliver_reg_ofs = 0xd80, 545 .phy_addr = 1, 546 }, 547 { 548 .slave_reg_ofs = 0x308, 549 .sliver_reg_ofs = 0xdc0, 550 .phy_addr = 2, 551 }, 552 }; 553 554 static struct cpsw_platform_data cpsw_data = { 555 .mdio_base = CPSW_MDIO_BASE, 556 .cpsw_base = CPSW_BASE, 557 .mdio_div = 0xff, 558 .channels = 8, 559 .cpdma_reg_ofs = 0x800, 560 .slaves = 1, 561 .slave_data = cpsw_slaves, 562 .ale_reg_ofs = 0xd00, 563 .ale_entries = 1024, 564 .host_port_reg_ofs = 0x108, 565 .hw_stats_reg_ofs = 0x900, 566 .bd_ram_ofs = 0x2000, 567 .mac_control = (1 << 5), 568 .control = cpsw_control, 569 .host_port_num = 0, 570 .version = CPSW_CTRL_VERSION_2, 571 }; 572 #endif /* CONFIG_DRIVER_TI_CPSW, ... */ 573 574 #if defined(CONFIG_DRIVER_TI_CPSW) 575 576 int board_eth_init(bd_t *bis) 577 { 578 int rv = 0; 579 char mac_addr[6]; 580 const char *mac = 0; 581 uint32_t mac_hi, mac_lo; 582 /* try reading mac address from efuse */ 583 mac_lo = readl(&cdev->macid0l); 584 mac_hi = readl(&cdev->macid0h); 585 mac_addr[0] = mac_hi & 0xFF; 586 mac_addr[1] = (mac_hi & 0xFF00) >> 8; 587 mac_addr[2] = (mac_hi & 0xFF0000) >> 16; 588 mac_addr[3] = (mac_hi & 0xFF000000) >> 24; 589 mac_addr[4] = mac_lo & 0xFF; 590 mac_addr[5] = (mac_lo & 0xFF00) >> 8; 591 592 #if (defined(CONFIG_DRIVER_TI_CPSW) && !defined(CONFIG_SPL_BUILD)) || \ 593 (defined(CONFIG_SPL_ETH_SUPPORT) && defined(CONFIG_SPL_BUILD)) 594 if (!getenv("ethaddr")) { 595 #if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_USE_FDT) 596 printf("<ethaddr> not set. trying DTB ... "); 597 mac = dtbmacaddr(0); 598 #endif 599 if (!mac) { 600 printf("<ethaddr> not set. validating E-fuse MAC ... "); 601 if (is_valid_ethaddr((const u8 *)mac_addr)) 602 mac = (const char *)mac_addr; 603 } 604 605 if (mac) { 606 printf("using: %pM on ", mac); 607 eth_setenv_enetaddr("ethaddr", (const u8 *)mac); 608 } 609 } 610 writel(MII_MODE_ENABLE, &cdev->miisel); 611 cpsw_slaves[0].phy_if = PHY_INTERFACE_MODE_MII; 612 cpsw_slaves[1].phy_if = PHY_INTERFACE_MODE_MII; 613 614 rv = cpsw_register(&cpsw_data); 615 if (rv < 0) { 616 printf("Error %d registering CPSW switch\n", rv); 617 return 0; 618 } 619 #endif /* CONFIG_DRIVER_TI_CPSW, ... */ 620 return rv; 621 } 622 #endif /* CONFIG_DRIVER_TI_CPSW */ 623 #if defined(CONFIG_GENERIC_MMC) && !defined(CONFIG_SPL_BUILD) 624 int board_mmc_init(bd_t *bis) 625 { 626 return omap_mmc_init(1, 0, 0, -1, -1); 627 } 628 #endif 629 int overwrite_console(void) 630 { 631 return 1; 632 } 633