1 /* 2 * (C) Heiko Schocher, DENX Software Engineering, hs@denx.de. 3 * Based on: 4 * U-Boot:board/davinci/da8xxevm/da850evm.c 5 * 6 * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/ 7 * 8 * Based on da830evm.c. Original Copyrights follow: 9 * 10 * Copyright (C) 2009 Nick Thompson, GE Fanuc, Ltd. <nick.thompson@gefanuc.com> 11 * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net> 12 * 13 * SPDX-License-Identifier: GPL-2.0+ 14 */ 15 16 #include <common.h> 17 #include <i2c.h> 18 #include <net.h> 19 #include <netdev.h> 20 #include <spi.h> 21 #include <spi_flash.h> 22 #include <asm/arch/hardware.h> 23 #include <asm/ti-common/davinci_nand.h> 24 #include <asm/arch/emac_defs.h> 25 #include <asm/arch/pinmux_defs.h> 26 #include <asm/io.h> 27 #include <asm/arch/davinci_misc.h> 28 #include <linux/errno.h> 29 #include <asm/gpio.h> 30 #include <hwconfig.h> 31 #include <bootstage.h> 32 33 DECLARE_GLOBAL_DATA_PTR; 34 35 #ifdef CONFIG_DRIVER_TI_EMAC 36 #ifdef CONFIG_DRIVER_TI_EMAC_USE_RMII 37 #define HAS_RMII 1 38 #else 39 #define HAS_RMII 0 40 #endif 41 #endif /* CONFIG_DRIVER_TI_EMAC */ 42 43 void dsp_lpsc_on(unsigned domain, unsigned int id) 44 { 45 dv_reg_p mdstat, mdctl, ptstat, ptcmd; 46 struct davinci_psc_regs *psc_regs; 47 48 psc_regs = davinci_psc0_regs; 49 mdstat = &psc_regs->psc0.mdstat[id]; 50 mdctl = &psc_regs->psc0.mdctl[id]; 51 ptstat = &psc_regs->ptstat; 52 ptcmd = &psc_regs->ptcmd; 53 54 while (*ptstat & (0x1 << domain)) 55 ; 56 57 if ((*mdstat & 0x1f) == 0x03) 58 return; /* Already on and enabled */ 59 60 *mdctl |= 0x03; 61 62 *ptcmd = 0x1 << domain; 63 64 while (*ptstat & (0x1 << domain)) 65 ; 66 while ((*mdstat & 0x1f) != 0x03) 67 ; /* Probably an overkill... */ 68 } 69 70 static void dspwake(void) 71 { 72 unsigned *resetvect = (unsigned *)DAVINCI_L3CBARAM_BASE; 73 u32 val; 74 75 /* if the device is ARM only, return */ 76 if ((readl(CHIP_REV_ID_REG) & 0x3f) == 0x10) 77 return; 78 79 if (hwconfig_subarg_cmp_f("dsp", "wake", "no", NULL)) 80 return; 81 82 *resetvect++ = 0x1E000; /* DSP Idle */ 83 /* clear out the next 10 words as NOP */ 84 memset(resetvect, 0, sizeof(unsigned) * 10); 85 86 /* setup the DSP reset vector */ 87 writel(DAVINCI_L3CBARAM_BASE, HOST1CFG); 88 89 dsp_lpsc_on(1, DAVINCI_LPSC_GEM); 90 val = readl(PSC0_MDCTL + (15 * 4)); 91 val |= 0x100; 92 writel(val, (PSC0_MDCTL + (15 * 4))); 93 } 94 95 int misc_init_r(void) 96 { 97 dspwake(); 98 return 0; 99 } 100 101 static const struct pinmux_config gpio_pins[] = { 102 /* GP7[14] selects bootmode*/ 103 { pinmux(16), 8, 3 }, /* GP7[14] */ 104 }; 105 106 const struct pinmux_resource pinmuxes[] = { 107 #ifdef CONFIG_DRIVER_TI_EMAC 108 PINMUX_ITEM(emac_pins_mdio), 109 #ifdef CONFIG_DRIVER_TI_EMAC_USE_RMII 110 PINMUX_ITEM(emac_pins_rmii), 111 #else 112 PINMUX_ITEM(emac_pins_mii), 113 #endif 114 #endif 115 PINMUX_ITEM(uart2_pins_txrx), 116 PINMUX_ITEM(uart2_pins_rtscts), 117 PINMUX_ITEM(uart0_pins_txrx), 118 PINMUX_ITEM(uart0_pins_rtscts), 119 #ifdef CONFIG_NAND_DAVINCI 120 PINMUX_ITEM(emifa_pins_cs3), 121 PINMUX_ITEM(emifa_pins_nand), 122 #endif 123 PINMUX_ITEM(gpio_pins), 124 }; 125 126 const int pinmuxes_size = ARRAY_SIZE(pinmuxes); 127 128 const struct lpsc_resource lpsc[] = { 129 { DAVINCI_LPSC_AEMIF }, /* NAND, NOR */ 130 { DAVINCI_LPSC_EMAC }, /* image download */ 131 { DAVINCI_LPSC_UART2 }, /* console */ 132 { DAVINCI_LPSC_UART0 }, /* console */ 133 { DAVINCI_LPSC_GPIO }, 134 }; 135 136 const int lpsc_size = ARRAY_SIZE(lpsc); 137 138 #ifndef CONFIG_DA850_EVM_MAX_CPU_CLK 139 #define CONFIG_DA850_EVM_MAX_CPU_CLK 300000000 140 #endif 141 142 #define REV_AM18X_EVM 0x100 143 144 /* 145 * get_board_rev() - setup to pass kernel board revision information 146 * Returns: 147 * bit[0-3] Maximum cpu clock rate supported by onboard SoC 148 * 0000b - 300 MHz 149 * 0001b - 372 MHz 150 * 0010b - 408 MHz 151 * 0011b - 456 MHz 152 */ 153 u32 get_board_rev(void) 154 { 155 char *s; 156 u32 maxcpuclk = CONFIG_DA850_EVM_MAX_CPU_CLK; 157 u32 rev = 0; 158 159 s = getenv("maxcpuclk"); 160 if (s) 161 maxcpuclk = simple_strtoul(s, NULL, 10); 162 163 if (maxcpuclk >= 456000000) 164 rev = 3; 165 else if (maxcpuclk >= 408000000) 166 rev = 2; 167 else if (maxcpuclk >= 372000000) 168 rev = 1; 169 #ifdef CONFIG_DA850_AM18X_EVM 170 rev |= REV_AM18X_EVM; 171 #endif 172 return rev; 173 } 174 175 int board_early_init_f(void) 176 { 177 /* 178 * Power on required peripherals 179 * ARM does not have access by default to PSC0 and PSC1 180 * assuming here that the DSP bootloader has set the IOPU 181 * such that PSC access is available to ARM 182 */ 183 if (da8xx_configure_lpsc_items(lpsc, ARRAY_SIZE(lpsc))) 184 return 1; 185 186 return 0; 187 } 188 189 int board_init(void) 190 { 191 irq_init(); 192 193 /* arch number of the board */ 194 gd->bd->bi_arch_number = MACH_TYPE_DAVINCI_DA850_EVM; 195 196 /* address of boot parameters */ 197 gd->bd->bi_boot_params = LINUX_BOOT_PARAM_ADDR; 198 199 /* setup the SUSPSRC for ARM to control emulation suspend */ 200 writel(readl(&davinci_syscfg_regs->suspsrc) & 201 ~(DAVINCI_SYSCFG_SUSPSRC_EMAC | DAVINCI_SYSCFG_SUSPSRC_I2C | 202 DAVINCI_SYSCFG_SUSPSRC_SPI1 | DAVINCI_SYSCFG_SUSPSRC_TIMER0 | 203 DAVINCI_SYSCFG_SUSPSRC_UART0), 204 &davinci_syscfg_regs->suspsrc); 205 206 /* configure pinmux settings */ 207 if (davinci_configure_pin_mux_items(pinmuxes, ARRAY_SIZE(pinmuxes))) 208 return 1; 209 210 #ifdef CONFIG_DRIVER_TI_EMAC 211 davinci_emac_mii_mode_sel(HAS_RMII); 212 #endif /* CONFIG_DRIVER_TI_EMAC */ 213 214 /* enable the console UART */ 215 writel((DAVINCI_UART_PWREMU_MGMT_FREE | DAVINCI_UART_PWREMU_MGMT_URRST | 216 DAVINCI_UART_PWREMU_MGMT_UTRST), 217 #if (CONFIG_SYS_NS16550_COM1 == DAVINCI_UART0_BASE) 218 &davinci_uart0_ctrl_regs->pwremu_mgmt); 219 #else 220 &davinci_uart2_ctrl_regs->pwremu_mgmt); 221 #endif 222 return 0; 223 } 224 225 #ifdef CONFIG_DRIVER_TI_EMAC 226 /* 227 * Initializes on-board ethernet controllers. 228 */ 229 int board_eth_init(bd_t *bis) 230 { 231 if (!davinci_emac_initialize()) { 232 printf("Error: Ethernet init failed!\n"); 233 return -1; 234 } 235 236 return 0; 237 } 238 #endif /* CONFIG_DRIVER_TI_EMAC */ 239 240 static int init_led(int gpio, char *name, int val) 241 { 242 int ret; 243 244 ret = gpio_request(gpio, name); 245 if (ret) 246 return -1; 247 ret = gpio_direction_output(gpio, val); 248 if (ret) 249 return -1; 250 251 return gpio; 252 } 253 254 #define LED_ON 0 255 #define LED_OFF 1 256 257 #if !defined(CONFIG_SPL_BUILD) 258 #ifdef CONFIG_SHOW_BOOT_PROGRESS 259 void show_boot_progress(int status) 260 { 261 static int red; 262 static int green; 263 264 if (red == 0) 265 red = init_led(CONFIG_IPAM390_GPIO_LED_RED, "red", LED_ON); 266 if (red != CONFIG_IPAM390_GPIO_LED_RED) 267 return; 268 if (green == 0) 269 green = init_led(CONFIG_IPAM390_GPIO_LED_GREEN, "green", 270 LED_OFF); 271 if (green != CONFIG_IPAM390_GPIO_LED_GREEN) 272 return; 273 274 switch (status) { 275 case BOOTSTAGE_ID_RUN_OS: 276 /* 277 * set normal state 278 * LED Red : on 279 * LED green: off 280 */ 281 gpio_set_value(red, LED_ON); 282 gpio_set_value(green, LED_OFF); 283 break; 284 case BOOTSTAGE_ID_MAIN_LOOP: 285 /* 286 * U-Boot operation 287 * LED Red : on 288 * LED green: on 289 */ 290 gpio_set_value(red, LED_ON); 291 gpio_set_value(green, LED_ON); 292 break; 293 } 294 } 295 #endif 296 #endif 297 298 #ifdef CONFIG_SPL_OS_BOOT 299 int spl_start_uboot(void) 300 { 301 int ret; 302 int bootmode = 0; 303 304 /* 305 * GP7[14] selects bootmode: 306 * 1: boot linux 307 * 0: boot u-boot 308 * if error accessing gpio boot U-Boot 309 * 310 * SPL bootmode 311 * 0: boot linux 312 * 1: boot u-boot 313 */ 314 ret = gpio_request(CONFIG_IPAM390_GPIO_BOOTMODE , "bootmode"); 315 if (ret) 316 bootmode = 1; 317 if (!bootmode) { 318 ret = gpio_direction_input(CONFIG_IPAM390_GPIO_BOOTMODE); 319 if (ret) 320 bootmode = 1; 321 } 322 if (!bootmode) 323 ret = gpio_get_value(CONFIG_IPAM390_GPIO_BOOTMODE); 324 if (!bootmode) 325 if (ret == 0) 326 bootmode = 1; 327 /* 328 * LED red : on 329 * LED green: off 330 */ 331 init_led(CONFIG_IPAM390_GPIO_LED_RED, "red", LED_ON); 332 init_led(CONFIG_IPAM390_GPIO_LED_GREEN, "green", LED_OFF); 333 return bootmode; 334 } 335 #endif 336