1 // SPDX-License-Identifier: GPL-2.0+ 2 /* 3 * Copyright 2013-2015 Arcturus Networks, Inc. 4 * http://www.arcturusnetworks.com/products/ucp1020/ 5 * by Oleksandr G Zhadan et al. 6 * based on board/freescale/p1_p2_rdb_pc/spl.c 7 * original copyright follows: 8 * Copyright 2013 Freescale Semiconductor, Inc. 9 */ 10 11 #include <common.h> 12 #include <command.h> 13 #include <hwconfig.h> 14 #include <pci.h> 15 #include <i2c.h> 16 #include <miiphy.h> 17 #include <linux/libfdt.h> 18 #include <fdt_support.h> 19 #include <fsl_mdio.h> 20 #include <tsec.h> 21 #include <ioports.h> 22 #include <netdev.h> 23 #include <micrel.h> 24 #include <spi_flash.h> 25 #include <mmc.h> 26 #include <linux/ctype.h> 27 #include <asm/fsl_serdes.h> 28 #include <asm/gpio.h> 29 #include <asm/processor.h> 30 #include <asm/mmu.h> 31 #include <asm/cache.h> 32 #include <asm/immap_85xx.h> 33 #include <asm/fsl_pci.h> 34 #include <fsl_ddr_sdram.h> 35 #include <asm/io.h> 36 #include <asm/fsl_law.h> 37 #include <asm/fsl_lbc.h> 38 #include <asm/mp.h> 39 #include "ucp1020.h" 40 41 void spi_set_speed(struct spi_slave *slave, uint hz) 42 { 43 /* TO DO: It's actially have to be in spi/ */ 44 } 45 46 /* 47 * To be compatible with cmd_gpio 48 */ 49 int name_to_gpio(const char *name) 50 { 51 int gpio = 31 - simple_strtoul(name, NULL, 10); 52 53 if (gpio < 16) 54 gpio = -1; 55 56 return gpio; 57 } 58 59 void board_gpio_init(void) 60 { 61 int i; 62 char envname[8], *val; 63 64 for (i = 0; i < GPIO_MAX_NUM; i++) { 65 sprintf(envname, "GPIO%d", i); 66 val = env_get(envname); 67 if (val) { 68 char direction = toupper(val[0]); 69 char level = toupper(val[1]); 70 71 if (direction == 'I') { 72 gpio_direction_input(i); 73 } else { 74 if (direction == 'O') { 75 if (level == '1') 76 gpio_direction_output(i, 1); 77 else 78 gpio_direction_output(i, 0); 79 } 80 } 81 } 82 } 83 84 val = env_get("PCIE_OFF"); 85 if (val) { 86 gpio_direction_input(GPIO_PCIE1_EN); 87 gpio_direction_input(GPIO_PCIE2_EN); 88 } else { 89 gpio_direction_output(GPIO_PCIE1_EN, 1); 90 gpio_direction_output(GPIO_PCIE2_EN, 1); 91 } 92 93 val = env_get("SDHC_CDWP_OFF"); 94 if (!val) { 95 ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); 96 97 setbits_be32(&gur->pmuxcr, 98 (MPC85xx_PMUXCR_SDHC_CD | MPC85xx_PMUXCR_SDHC_WP)); 99 } 100 } 101 102 int board_early_init_f(void) 103 { 104 return 0; /* Just in case. Could be disable in config file */ 105 } 106 107 int checkboard(void) 108 { 109 printf("Board: %s\n", CONFIG_BOARDNAME_LOCAL); 110 board_gpio_init(); 111 printf("SD/MMC: 4-bit Mode\n"); 112 113 return 0; 114 } 115 116 #ifdef CONFIG_PCI 117 void pci_init_board(void) 118 { 119 fsl_pcie_init_board(0); 120 } 121 #endif 122 123 int board_early_init_r(void) 124 { 125 const unsigned int flashbase = CONFIG_SYS_FLASH_BASE; 126 const u8 flash_esel = find_tlb_idx((void *)flashbase, 1); 127 128 /* 129 * Remap Boot flash region to caching-inhibited 130 * so that flash can be erased properly. 131 */ 132 133 /* Flush d-cache and invalidate i-cache of any FLASH data */ 134 flush_dcache(); 135 invalidate_icache(); 136 137 /* invalidate existing TLB entry for flash */ 138 disable_tlb(flash_esel); 139 140 set_tlb(1, flashbase, CONFIG_SYS_FLASH_BASE_PHYS, /* tlb, epn, rpn */ 141 MAS3_SX | MAS3_SW | MAS3_SR, MAS2_I | MAS2_G, /* perms, wimge */ 142 0, flash_esel, BOOKE_PAGESZ_64M, 1);/* ts, esel, tsize, iprot */ 143 144 return 0; 145 } 146 147 int board_phy_config(struct phy_device *phydev) 148 { 149 #if defined(CONFIG_PHY_MICREL_KSZ9021) 150 int regval; 151 static int cnt; 152 153 if (cnt++ == 0) 154 printf("PHYs address ["); 155 156 if (phydev->addr == TSEC1_PHY_ADDR || phydev->addr == TSEC3_PHY_ADDR) { 157 regval = 158 ksz9021_phy_extended_read(phydev, 159 MII_KSZ9021_EXT_STRAP_STATUS); 160 /* 161 * min rx data delay 162 */ 163 ksz9021_phy_extended_write(phydev, 164 MII_KSZ9021_EXT_RGMII_RX_DATA_SKEW, 165 0x6666); 166 /* 167 * max rx/tx clock delay, min rx/tx control 168 */ 169 ksz9021_phy_extended_write(phydev, 170 MII_KSZ9021_EXT_RGMII_CLOCK_SKEW, 171 0xf6f6); 172 printf("0x%x", (regval & 0x1f)); 173 } else { 174 printf("0x%x", (TSEC2_PHY_ADDR & 0x1f)); 175 } 176 if (cnt == 3) 177 printf("] "); 178 else 179 printf(","); 180 #endif 181 182 #if defined(CONFIG_PHY_MICREL_KSZ9031_DEBUG) 183 regval = ksz9031_phy_extended_read(phydev, 2, 0x01, 0x4000); 184 if (regval >= 0) 185 printf(" (ADDR 0x%x) ", regval & 0x1f); 186 #endif 187 188 return 0; 189 } 190 191 int last_stage_init(void) 192 { 193 static char newkernelargs[256]; 194 static u8 id1[16]; 195 static u8 id2; 196 struct mmc *mmc; 197 char *sval, *kval; 198 199 if (i2c_read(CONFIG_SYS_I2C_IDT6V49205B, 7, 1, &id1[0], 2) < 0) { 200 printf("Error reading i2c IDT6V49205B information!\n"); 201 } else { 202 printf("IDT6V49205B(0x%02x): ready\n", id1[1]); 203 i2c_read(CONFIG_SYS_I2C_IDT6V49205B, 4, 1, &id1[0], 2); 204 if (!(id1[1] & 0x02)) { 205 id1[1] |= 0x02; 206 i2c_write(CONFIG_SYS_I2C_IDT6V49205B, 4, 1, &id1[0], 2); 207 asm("nop; nop"); 208 } 209 } 210 211 if (i2c_read(CONFIG_SYS_I2C_NCT72_ADDR, 0xFE, 1, &id2, 1) < 0) 212 printf("Error reading i2c NCT72 information!\n"); 213 else 214 printf("NCT72(0x%x): ready\n", id2); 215 216 kval = env_get("kernelargs"); 217 218 mmc = find_mmc_device(0); 219 if (mmc) 220 if (!mmc_init(mmc)) { 221 printf("MMC/SD card detected\n"); 222 if (kval) { 223 int n = strlen(defkargs); 224 char *tmp = strstr(kval, defkargs); 225 226 *tmp = 0; 227 strcpy(newkernelargs, kval); 228 strcat(newkernelargs, " "); 229 strcat(newkernelargs, mmckargs); 230 strcat(newkernelargs, " "); 231 strcat(newkernelargs, &tmp[n]); 232 env_set("kernelargs", newkernelargs); 233 } else { 234 env_set("kernelargs", mmckargs); 235 } 236 } 237 get_arc_info(); 238 239 if (kval) { 240 sval = env_get("SERIAL"); 241 if (sval) { 242 strcpy(newkernelargs, "SN="); 243 strcat(newkernelargs, sval); 244 strcat(newkernelargs, " "); 245 strcat(newkernelargs, kval); 246 env_set("kernelargs", newkernelargs); 247 } 248 } else { 249 printf("Error reading kernelargs env variable!\n"); 250 } 251 252 return 0; 253 } 254 255 int board_eth_init(bd_t *bis) 256 { 257 struct fsl_pq_mdio_info mdio_info; 258 struct tsec_info_struct tsec_info[4]; 259 #ifdef CONFIG_TSEC2 260 ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); 261 #endif 262 int num = 0; 263 264 #ifdef CONFIG_TSEC1 265 SET_STD_TSEC_INFO(tsec_info[num], 1); 266 num++; 267 #endif 268 #ifdef CONFIG_TSEC2 269 SET_STD_TSEC_INFO(tsec_info[num], 2); 270 if (is_serdes_configured(SGMII_TSEC2)) { 271 if (!(in_be32(&gur->pordevsr) & MPC85xx_PORDEVSR_SGMII2_DIS)) { 272 puts("eTSEC2 is in sgmii mode.\n"); 273 tsec_info[num].flags |= TSEC_SGMII; 274 tsec_info[num].phyaddr = TSEC2_PHY_ADDR_SGMII; 275 } 276 } 277 num++; 278 #endif 279 #ifdef CONFIG_TSEC3 280 SET_STD_TSEC_INFO(tsec_info[num], 3); 281 num++; 282 #endif 283 284 if (!num) { 285 printf("No TSECs initialized\n"); 286 return 0; 287 } 288 289 mdio_info.regs = (struct tsec_mii_mng *)CONFIG_SYS_MDIO_BASE_ADDR; 290 mdio_info.name = DEFAULT_MII_NAME; 291 292 fsl_pq_mdio_init(bis, &mdio_info); 293 294 tsec_eth_init(bis, tsec_info, num); 295 296 return pci_eth_init(bis); 297 } 298 299 #ifdef CONFIG_OF_BOARD_SETUP 300 int ft_board_setup(void *blob, bd_t *bd) 301 { 302 phys_addr_t base; 303 phys_size_t size; 304 const char *soc_usb_compat = "fsl-usb2-dr"; 305 int err, usb1_off, usb2_off; 306 307 ft_cpu_setup(blob, bd); 308 309 base = env_get_bootm_low(); 310 size = env_get_bootm_size(); 311 312 fdt_fixup_memory(blob, (u64)base, (u64)size); 313 314 FT_FSL_PCI_SETUP; 315 316 #if defined(CONFIG_HAS_FSL_DR_USB) 317 fsl_fdt_fixup_dr_usb(blob, bd); 318 #endif 319 320 #if defined(CONFIG_SDCARD) || defined(CONFIG_SPIFLASH) 321 /* Delete eLBC node as it is muxed with USB2 controller */ 322 if (hwconfig("usb2")) { 323 const char *soc_elbc_compat = "fsl,p1020-elbc"; 324 int off = fdt_node_offset_by_compatible(blob, -1, 325 soc_elbc_compat); 326 if (off < 0) { 327 printf 328 ("WARNING: could not find compatible node %s: %s\n", 329 soc_elbc_compat, fdt_strerror(off)); 330 return off; 331 } 332 err = fdt_del_node(blob, off); 333 if (err < 0) { 334 printf("WARNING: could not remove %s: %s\n", 335 soc_elbc_compat, fdt_strerror(err)); 336 } 337 return err; 338 } 339 #endif 340 341 /* Delete USB2 node as it is muxed with eLBC */ 342 usb1_off = fdt_node_offset_by_compatible(blob, -1, soc_usb_compat); 343 if (usb1_off < 0) { 344 printf("WARNING: could not find compatible node %s: %s.\n", 345 soc_usb_compat, fdt_strerror(usb1_off)); 346 return usb1_off; 347 } 348 usb2_off = 349 fdt_node_offset_by_compatible(blob, usb1_off, soc_usb_compat); 350 if (usb2_off < 0) { 351 printf("WARNING: could not find compatible node %s: %s.\n", 352 soc_usb_compat, fdt_strerror(usb2_off)); 353 return usb2_off; 354 } 355 err = fdt_del_node(blob, usb2_off); 356 if (err < 0) { 357 printf("WARNING: could not remove %s: %s.\n", 358 soc_usb_compat, fdt_strerror(err)); 359 } 360 return 0; 361 } 362 #endif 363