1 /* 2 * Copyright 2013-2015 Arcturus Networks, Inc. 3 * http://www.arcturusnetworks.com/products/ucp1020/ 4 * based on board/freescale/p1_p2_rdb_pc/spl.c 5 * original copyright follows: 6 * Copyright 2013 Freescale Semiconductor, Inc. 7 * 8 * SPDX-License-Identifier: GPL-2.0+ 9 */ 10 11 #include <common.h> 12 #include <ns16550.h> 13 #include <malloc.h> 14 #include <mmc.h> 15 #include <nand.h> 16 #include <i2c.h> 17 #include <fsl_esdhc.h> 18 #include <spi_flash.h> 19 20 DECLARE_GLOBAL_DATA_PTR; 21 22 static const u32 sysclk_tbl[] = { 23 66666000, 7499900, 83332500, 8999900, 24 99999000, 11111000, 12499800, 13333200 25 }; 26 27 phys_size_t get_effective_memsize(void) 28 { 29 return CONFIG_SYS_L2_SIZE; 30 } 31 32 void board_init_f(ulong bootflag) 33 { 34 u32 plat_ratio, bus_clk; 35 ccsr_gur_t *gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR; 36 37 console_init_f(); 38 39 /* Set pmuxcr to allow both i2c1 and i2c2 */ 40 setbits_be32(&gur->pmuxcr, in_be32(&gur->pmuxcr) | 0x1000); 41 setbits_be32(&gur->pmuxcr, 42 in_be32(&gur->pmuxcr) | MPC85xx_PMUXCR_SD_DATA); 43 44 /* Read back the register to synchronize the write. */ 45 in_be32(&gur->pmuxcr); 46 47 #ifdef CONFIG_SPL_SPI_BOOT 48 clrbits_be32(&gur->pmuxcr, MPC85xx_PMUXCR_SD_DATA); 49 #endif 50 51 /* initialize selected port with appropriate baud rate */ 52 plat_ratio = in_be32(&gur->porpllsr) & MPC85xx_PORPLLSR_PLAT_RATIO; 53 plat_ratio >>= 1; 54 bus_clk = CONFIG_SYS_CLK_FREQ * plat_ratio; 55 gd->bus_clk = bus_clk; 56 57 NS16550_init((NS16550_t)CONFIG_SYS_NS16550_COM1, 58 bus_clk / 16 / CONFIG_BAUDRATE); 59 #ifdef CONFIG_SPL_MMC_BOOT 60 puts("\nSD boot...\n"); 61 #elif defined(CONFIG_SPL_SPI_BOOT) 62 puts("\nSPI Flash boot...\n"); 63 #endif 64 65 /* copy code to RAM and jump to it - this should not return */ 66 /* NOTE - code has to be copied out of NAND buffer before 67 * other blocks can be read. 68 */ 69 relocate_code(CONFIG_SPL_RELOC_STACK, 0, CONFIG_SPL_RELOC_TEXT_BASE); 70 } 71 72 void board_init_r(gd_t *gd, ulong dest_addr) 73 { 74 /* Pointer is writable since we allocated a register for it */ 75 gd = (gd_t *)CONFIG_SPL_GD_ADDR; 76 bd_t *bd; 77 78 memset(gd, 0, sizeof(gd_t)); 79 bd = (bd_t *)(CONFIG_SPL_GD_ADDR + sizeof(gd_t)); 80 memset(bd, 0, sizeof(bd_t)); 81 gd->bd = bd; 82 bd->bi_memstart = CONFIG_SYS_INIT_L2_ADDR; 83 bd->bi_memsize = CONFIG_SYS_L2_SIZE; 84 85 probecpu(); 86 get_clocks(); 87 mem_malloc_init(CONFIG_SPL_RELOC_MALLOC_ADDR, 88 CONFIG_SPL_RELOC_MALLOC_SIZE); 89 90 #ifndef CONFIG_SPL_NAND_BOOT 91 env_init(); 92 #endif 93 #ifdef CONFIG_SPL_MMC_BOOT 94 mmc_initialize(bd); 95 #endif 96 /* relocate environment function pointers etc. */ 97 #ifdef CONFIG_SPL_NAND_BOOT 98 nand_spl_load_image(CONFIG_ENV_OFFSET, CONFIG_ENV_SIZE, 99 (uchar *)CONFIG_ENV_ADDR); 100 gd->env_addr = (ulong)(CONFIG_ENV_ADDR); 101 gd->env_valid = 1; 102 #else 103 env_relocate(); 104 #endif 105 106 #ifdef CONFIG_SYS_I2C 107 i2c_init_all(); 108 #else 109 i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); 110 #endif 111 112 gd->ram_size = initdram(0); 113 #ifdef CONFIG_SPL_NAND_BOOT 114 puts("Tertiary program loader running in sram..."); 115 #else 116 puts("Second program loader running in sram...\n"); 117 #endif 118 119 #ifdef CONFIG_SPL_MMC_BOOT 120 mmc_boot(); 121 #elif defined(CONFIG_SPL_SPI_BOOT) 122 spi_boot(); 123 #elif defined(CONFIG_SPL_NAND_BOOT) 124 nand_boot(); 125 #endif 126 } 127