1 /*
2  * Copyright (C) 2011 Andes Technology Corporation
3  * Shawn Lin, Andes Technology Corporation <nobuhiro@andestech.com>
4  * Macpaul Lin, Andes Technology Corporation <macpaul@andestech.com>
5  *
6  * SPDX-License-Identifier:	GPL-2.0+
7  */
8 
9 #include <common.h>
10 #include <netdev.h>
11 #include <asm/io.h>
12 
13 #include <faraday/ftsdc010.h>
14 #include <faraday/ftsmc020.h>
15 
16 DECLARE_GLOBAL_DATA_PTR;
17 
18 /*
19  * Miscellaneous platform dependent initializations
20  */
21 
22 int board_init(void)
23 {
24 	/*
25 	 * refer to BOOT_PARAMETER_PA_BASE within
26 	 * "linux/arch/nds32/include/asm/misc_spec.h"
27 	 */
28 	gd->bd->bi_arch_number = MACH_TYPE_ADPAG101P;
29 	gd->bd->bi_boot_params = PHYS_SDRAM_0 + 0x400;
30 
31 	ftsmc020_init();	/* initialize Flash */
32 	return 0;
33 }
34 
35 int dram_init(void)
36 {
37 	unsigned long sdram_base = PHYS_SDRAM_0;
38 	unsigned long expected_size = PHYS_SDRAM_0_SIZE + PHYS_SDRAM_1_SIZE;
39 	unsigned long actual_size;
40 
41 	actual_size = get_ram_size((void *)sdram_base, expected_size);
42 
43 	gd->ram_size = actual_size;
44 
45 	if (expected_size != actual_size) {
46 		printf("Warning: Only %lu of %lu MiB SDRAM is working\n",
47 				actual_size >> 20, expected_size >> 20);
48 	}
49 
50 	return 0;
51 }
52 
53 void dram_init_banksize(void)
54 {
55 	gd->bd->bi_dram[0].start = PHYS_SDRAM_0;
56 	gd->bd->bi_dram[0].size =  PHYS_SDRAM_0_SIZE;
57 	gd->bd->bi_dram[1].start = PHYS_SDRAM_1;
58 	gd->bd->bi_dram[1].size =  PHYS_SDRAM_1_SIZE;
59 }
60 
61 int board_eth_init(bd_t *bd)
62 {
63 	return ftmac100_initialize(bd);
64 }
65 
66 ulong board_flash_get_legacy(ulong base, int banknum, flash_info_t *info)
67 {
68 	if (banknum == 0) {	/* non-CFI boot flash */
69 		info->portwidth = FLASH_CFI_8BIT;
70 		info->chipwidth = FLASH_CFI_BY8;
71 		info->interface = FLASH_CFI_X8;
72 		return 1;
73 	} else {
74 		return 0;
75 	}
76 }
77 
78 int board_mmc_init(bd_t *bis)
79 {
80 	ftsdc010_mmc_init(0);
81 	return 0;
82 }
83