1 /*
2  * Copyright (C) 2011 Andes Technology Corporation
3  * Shawn Lin, Andes Technology Corporation <nobuhiro@andestech.com>
4  * Macpaul Lin, Andes Technology Corporation <macpaul@andestech.com>
5  *
6  * SPDX-License-Identifier:	GPL-2.0+
7  */
8 
9 #include <common.h>
10 #if defined(CONFIG_FTMAC100) && !defined(CONFIG_DM_ETH)
11 #include <netdev.h>
12 #endif
13 #include <linux/io.h>
14 #include <faraday/ftsdc010.h>
15 #include <faraday/ftsmc020.h>
16 
17 DECLARE_GLOBAL_DATA_PTR;
18 
19 /*
20  * Miscellaneous platform dependent initializations
21  */
22 int board_init(void)
23 {
24 	/*
25 	 * refer to BOOT_PARAMETER_PA_BASE within
26 	 * "linux/arch/nds32/include/asm/misc_spec.h"
27 	 */
28 	printf("Board: %s\n" , CONFIG_SYS_BOARD);
29 	gd->bd->bi_arch_number = MACH_TYPE_ADPAE3XX;
30 	gd->bd->bi_boot_params = PHYS_SDRAM_0 + 0x400;
31 	return 0;
32 }
33 
34 int dram_init(void)
35 {
36 	unsigned long sdram_base = PHYS_SDRAM_0;
37 	unsigned long expected_size = PHYS_SDRAM_0_SIZE + PHYS_SDRAM_1_SIZE;
38 	unsigned long actual_size;
39 	actual_size = get_ram_size((void *)sdram_base, expected_size);
40 	gd->ram_size = actual_size;
41 	if (expected_size != actual_size) {
42 		printf("Warning: Only %lu of %lu MiB SDRAM is working\n",
43 				actual_size >> 20, expected_size >> 20);
44 	}
45 
46 	return 0;
47 }
48 
49 int dram_init_banksize(void)
50 {
51 	gd->bd->bi_dram[0].start = PHYS_SDRAM_0;
52 	gd->bd->bi_dram[0].size =  PHYS_SDRAM_0_SIZE;
53 	gd->bd->bi_dram[1].start = PHYS_SDRAM_1;
54 	gd->bd->bi_dram[1].size =  PHYS_SDRAM_1_SIZE;
55 
56 	return 0;
57 }
58 
59 #if defined(CONFIG_FTMAC100) && !defined(CONFIG_DM_ETH)
60 int board_eth_init(bd_t *bd)
61 {
62 	return ftmac100_initialize(bd);
63 }
64 #endif
65 
66 ulong board_flash_get_legacy(ulong base, int banknum, flash_info_t *info)
67 {
68 	if (banknum == 0) {	/* non-CFI boot flash */
69 		info->portwidth = FLASH_CFI_8BIT;
70 		info->chipwidth = FLASH_CFI_BY8;
71 		info->interface = FLASH_CFI_X8;
72 		return 1;
73 	} else {
74 		return 0;
75 	}
76 }
77 
78 int board_mmc_init(bd_t *bis)
79 {
80 #ifndef CONFIG_DM_MMC
81 #ifdef CONFIG_FTSDC010
82 	ftsdc010_mmc_init(0);
83 #endif
84 #endif
85 	return 0;
86 }
87