1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 /* 3 * IO header file 4 * 5 * Copyright (C) 2001-2007 Tensilica Inc. 6 * Based on the Linux/Xtensa version of this header. 7 */ 8 9 #ifndef _XTENSA_IO_H 10 #define _XTENSA_IO_H 11 12 #include <linux/types.h> 13 #include <asm/byteorder.h> 14 15 /* 16 * swap functions to change byte order from little-endian to big-endian and 17 * vice versa. 18 */ 19 20 static inline unsigned short _swapw(unsigned short v) 21 { 22 return (v << 8) | (v >> 8); 23 } 24 25 static inline unsigned int _swapl(unsigned int v) 26 { 27 return (v << 24) | ((v & 0xff00) << 8) | 28 ((v >> 8) & 0xff00) | (v >> 24); 29 } 30 31 /* 32 * Generic I/O 33 */ 34 35 #define readb(addr) \ 36 ({ unsigned char __v = (*(volatile unsigned char *)(addr)); __v; }) 37 #define readw(addr) \ 38 ({ unsigned short __v = (*(volatile unsigned short *)(addr)); __v; }) 39 #define readl(addr) \ 40 ({ unsigned int __v = (*(volatile unsigned int *)(addr)); __v; }) 41 #define writeb(b, addr) (void)((*(volatile unsigned char *)(addr)) = (b)) 42 #define writew(b, addr) (void)((*(volatile unsigned short *)(addr)) = (b)) 43 #define writel(b, addr) (void)((*(volatile unsigned int *)(addr)) = (b)) 44 45 #define __raw_readb readb 46 #define __raw_readw readw 47 #define __raw_readl readl 48 #define __raw_writeb writeb 49 #define __raw_writew writew 50 #define __raw_writel writel 51 52 /* These are the definitions for the x86 IO instructions 53 * inb/inw/inl/outb/outw/outl, the "string" versions 54 * insb/insw/insl/outsb/outsw/outsl, and the "pausing" versions 55 * inb_p/inw_p/... 56 * The macros don't do byte-swapping. 57 */ 58 59 #define inb(port) readb((u8 *)((port))) 60 #define outb(val, port) writeb((val), (u8 *)((unsigned long)(port))) 61 #define inw(port) readw((u16 *)((port))) 62 #define outw(val, port) writew((val), (u16 *)((unsigned long)(port))) 63 #define inl(port) readl((u32 *)((port))) 64 #define outl(val, port) writel((val), (u32 *)((unsigned long)(port))) 65 66 #define inb_p(port) inb((port)) 67 #define outb_p(val, port) outb((val), (port)) 68 #define inw_p(port) inw((port)) 69 #define outw_p(val, port) outw((val), (port)) 70 #define inl_p(port) inl((port)) 71 #define outl_p(val, port) outl((val), (port)) 72 73 void insb(unsigned long port, void *dst, unsigned long count); 74 void insw(unsigned long port, void *dst, unsigned long count); 75 void insl(unsigned long port, void *dst, unsigned long count); 76 void outsb(unsigned long port, const void *src, unsigned long count); 77 void outsw(unsigned long port, const void *src, unsigned long count); 78 void outsl(unsigned long port, const void *src, unsigned long count); 79 80 #define IO_SPACE_LIMIT ~0 81 82 #define memset_io(a, b, c) memset((void *)(a), (b), (c)) 83 #define memcpy_fromio(a, b, c) memcpy((a), (void *)(b), (c)) 84 #define memcpy_toio(a, b, c) memcpy((void *)(a), (b), (c)) 85 86 /* At this point the Xtensa doesn't provide byte swap instructions */ 87 88 #ifdef __XTENSA_EB__ 89 # define in_8(addr) (*(u8 *)(addr)) 90 # define in_le16(addr) _swapw(*(u16 *)(addr)) 91 # define in_le32(addr) _swapl(*(u32 *)(addr)) 92 # define out_8(b, addr) *(u8 *)(addr) = (b) 93 # define out_le16(b, addr) *(u16 *)(addr) = _swapw(b) 94 # define out_le32(b, addr) *(u32 *)(addr) = _swapl(b) 95 #elif defined(__XTENSA_EL__) 96 # define in_8(addr) (*(u8 *)(addr)) 97 # define in_le16(addr) (*(u16 *)(addr)) 98 # define in_le32(addr) (*(u32 *)(addr)) 99 # define out_8(b, addr) *(u8 *)(addr) = (b) 100 # define out_le16(b, addr) *(u16 *)(addr) = (b) 101 # define out_le32(b, addr) *(u32 *)(addr) = (b) 102 #else 103 # error processor byte order undefined! 104 #endif 105 106 107 /* 108 * Convert a physical pointer to a virtual kernel pointer for /dev/mem access 109 */ 110 #define xlate_dev_mem_ptr(p) __va(p) 111 112 /* 113 * Convert a virtual cached pointer to an uncached pointer 114 */ 115 #define xlate_dev_kmem_ptr(p) p 116 117 /* 118 * Dummy function to keep U-Boot's cfi_flash.c driver happy. 119 */ 120 static inline void sync(void) 121 { 122 } 123 124 #include <asm-generic/io.h> 125 126 #endif /* _XTENSA_IO_H */ 127