xref: /openbmc/u-boot/arch/xtensa/include/asm/cache.h (revision cd71b1d5)
1 /* SPDX-License-Identifier: GPL-2.0+ */
2 /*
3  * Copyright (C) 2009 Tensilica Inc.
4  */
5 #ifndef _XTENSA_CACHE_H
6 #define _XTENSA_CACHE_H
7 
8 #include <asm/arch/core.h>
9 
10 #define ARCH_DMA_MINALIGN	XCHAL_DCACHE_LINESIZE
11 
12 #ifndef __ASSEMBLY__
13 
14 void __flush_dcache_all(void);
15 void __flush_invalidate_dcache_range(unsigned long addr, unsigned long size);
16 void __invalidate_dcache_all(void);
17 void __invalidate_dcache_range(unsigned long addr, unsigned long size);
18 
19 void __invalidate_icache_all(void);
20 void __invalidate_icache_range(unsigned long addr, unsigned long size);
21 
22 #endif
23 
24 #endif	/* _XTENSA_CACHE_H */
25