1*a674313cSPatrick Delaunay /* SPDX-License-Identifier: GPL-2.0 or BSD-3-Clause */
2*a674313cSPatrick Delaunay /*
3*a674313cSPatrick Delaunay  * Copyright (C) STMicroelectronics 2018 - All Rights Reserved
4*a674313cSPatrick Delaunay  * Author: Gabriel Fernandez <gabriel.fernandez@st.com> for STMicroelectronics.
5*a674313cSPatrick Delaunay  */
6*a674313cSPatrick Delaunay 
7*a674313cSPatrick Delaunay #ifndef _DT_BINDINGS_STM32MP1_RESET_H_
8*a674313cSPatrick Delaunay #define _DT_BINDINGS_STM32MP1_RESET_H_
9*a674313cSPatrick Delaunay 
10*a674313cSPatrick Delaunay #define LTDC_R		3072
11*a674313cSPatrick Delaunay #define DSI_R		3076
12*a674313cSPatrick Delaunay #define DDRPERFM_R	3080
13*a674313cSPatrick Delaunay #define USBPHY_R	3088
14*a674313cSPatrick Delaunay #define SPI6_R		3136
15*a674313cSPatrick Delaunay #define I2C4_R		3138
16*a674313cSPatrick Delaunay #define I2C6_R		3139
17*a674313cSPatrick Delaunay #define USART1_R	3140
18*a674313cSPatrick Delaunay #define STGEN_R		3156
19*a674313cSPatrick Delaunay #define GPIOZ_R		3200
20*a674313cSPatrick Delaunay #define CRYP1_R		3204
21*a674313cSPatrick Delaunay #define HASH1_R		3205
22*a674313cSPatrick Delaunay #define RNG1_R		3206
23*a674313cSPatrick Delaunay #define AXIM_R		3216
24*a674313cSPatrick Delaunay #define GPU_R		3269
25*a674313cSPatrick Delaunay #define ETHMAC_R	3274
26*a674313cSPatrick Delaunay #define FMC_R		3276
27*a674313cSPatrick Delaunay #define QSPI_R		3278
28*a674313cSPatrick Delaunay #define SDMMC1_R	3280
29*a674313cSPatrick Delaunay #define SDMMC2_R	3281
30*a674313cSPatrick Delaunay #define CRC1_R		3284
31*a674313cSPatrick Delaunay #define USBH_R		3288
32*a674313cSPatrick Delaunay #define MDMA_R		3328
33*a674313cSPatrick Delaunay #define MCU_R		8225
34*a674313cSPatrick Delaunay #define TIM2_R		19456
35*a674313cSPatrick Delaunay #define TIM3_R		19457
36*a674313cSPatrick Delaunay #define TIM4_R		19458
37*a674313cSPatrick Delaunay #define TIM5_R		19459
38*a674313cSPatrick Delaunay #define TIM6_R		19460
39*a674313cSPatrick Delaunay #define TIM7_R		19461
40*a674313cSPatrick Delaunay #define TIM12_R		16462
41*a674313cSPatrick Delaunay #define TIM13_R		16463
42*a674313cSPatrick Delaunay #define TIM14_R		16464
43*a674313cSPatrick Delaunay #define LPTIM1_R	19465
44*a674313cSPatrick Delaunay #define SPI2_R		19467
45*a674313cSPatrick Delaunay #define SPI3_R		19468
46*a674313cSPatrick Delaunay #define USART2_R	19470
47*a674313cSPatrick Delaunay #define USART3_R	19471
48*a674313cSPatrick Delaunay #define UART4_R		19472
49*a674313cSPatrick Delaunay #define UART5_R		19473
50*a674313cSPatrick Delaunay #define UART7_R		19474
51*a674313cSPatrick Delaunay #define UART8_R		19475
52*a674313cSPatrick Delaunay #define I2C1_R		19477
53*a674313cSPatrick Delaunay #define I2C2_R		19478
54*a674313cSPatrick Delaunay #define I2C3_R		19479
55*a674313cSPatrick Delaunay #define I2C5_R		19480
56*a674313cSPatrick Delaunay #define SPDIF_R		19482
57*a674313cSPatrick Delaunay #define CEC_R		19483
58*a674313cSPatrick Delaunay #define DAC12_R		19485
59*a674313cSPatrick Delaunay #define MDIO_R		19847
60*a674313cSPatrick Delaunay #define TIM1_R		19520
61*a674313cSPatrick Delaunay #define TIM8_R		19521
62*a674313cSPatrick Delaunay #define TIM15_R		19522
63*a674313cSPatrick Delaunay #define TIM16_R		19523
64*a674313cSPatrick Delaunay #define TIM17_R		19524
65*a674313cSPatrick Delaunay #define SPI1_R		19528
66*a674313cSPatrick Delaunay #define SPI4_R		19529
67*a674313cSPatrick Delaunay #define SPI5_R		19530
68*a674313cSPatrick Delaunay #define USART6_R	19533
69*a674313cSPatrick Delaunay #define SAI1_R		19536
70*a674313cSPatrick Delaunay #define SAI2_R		19537
71*a674313cSPatrick Delaunay #define SAI3_R		19538
72*a674313cSPatrick Delaunay #define DFSDM_R		19540
73*a674313cSPatrick Delaunay #define FDCAN_R		19544
74*a674313cSPatrick Delaunay #define LPTIM2_R	19584
75*a674313cSPatrick Delaunay #define LPTIM3_R	19585
76*a674313cSPatrick Delaunay #define LPTIM4_R	19586
77*a674313cSPatrick Delaunay #define LPTIM5_R	19587
78*a674313cSPatrick Delaunay #define SAI4_R		19592
79*a674313cSPatrick Delaunay #define SYSCFG_R	19595
80*a674313cSPatrick Delaunay #define VREF_R		19597
81*a674313cSPatrick Delaunay #define TMPSENS_R	19600
82*a674313cSPatrick Delaunay #define PMBCTRL_R	19601
83*a674313cSPatrick Delaunay #define DMA1_R		19648
84*a674313cSPatrick Delaunay #define DMA2_R		19649
85*a674313cSPatrick Delaunay #define DMAMUX_R	19650
86*a674313cSPatrick Delaunay #define ADC12_R		19653
87*a674313cSPatrick Delaunay #define USBO_R		19656
88*a674313cSPatrick Delaunay #define SDMMC3_R	19664
89*a674313cSPatrick Delaunay #define CAMITF_R	19712
90*a674313cSPatrick Delaunay #define CRYP2_R		19716
91*a674313cSPatrick Delaunay #define HASH2_R		19717
92*a674313cSPatrick Delaunay #define RNG2_R		19718
93*a674313cSPatrick Delaunay #define CRC2_R		19719
94*a674313cSPatrick Delaunay #define HSEM_R		19723
95*a674313cSPatrick Delaunay #define MBOX_R		19724
96*a674313cSPatrick Delaunay #define GPIOA_R		19776
97*a674313cSPatrick Delaunay #define GPIOB_R		19777
98*a674313cSPatrick Delaunay #define GPIOC_R		19778
99*a674313cSPatrick Delaunay #define GPIOD_R		19779
100*a674313cSPatrick Delaunay #define GPIOE_R		19780
101*a674313cSPatrick Delaunay #define GPIOF_R		19781
102*a674313cSPatrick Delaunay #define GPIOG_R		19782
103*a674313cSPatrick Delaunay #define GPIOH_R		19783
104*a674313cSPatrick Delaunay #define GPIOI_R		19784
105*a674313cSPatrick Delaunay #define GPIOJ_R		19785
106*a674313cSPatrick Delaunay #define GPIOK_R		19786
107*a674313cSPatrick Delaunay 
108*a674313cSPatrick Delaunay #endif /* _DT_BINDINGS_STM32MP1_RESET_H_ */
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