1*78a08019SNeil Armstrong /* 2*78a08019SNeil Armstrong * 3*78a08019SNeil Armstrong * Copyright (c) 2016 BayLibre, SAS. 4*78a08019SNeil Armstrong * Author: Neil Armstrong <narmstrong@baylibre.com> 5*78a08019SNeil Armstrong * 6*78a08019SNeil Armstrong * Copyright (c) 2017 Amlogic, inc. 7*78a08019SNeil Armstrong * Author: Yixun Lan <yixun.lan@amlogic.com> 8*78a08019SNeil Armstrong * 9*78a08019SNeil Armstrong * SPDX-License-Identifier: (GPL-2.0+ OR BSD) 10*78a08019SNeil Armstrong */ 11*78a08019SNeil Armstrong 12*78a08019SNeil Armstrong #ifndef _DT_BINDINGS_AMLOGIC_MESON_AXG_RESET_H 13*78a08019SNeil Armstrong #define _DT_BINDINGS_AMLOGIC_MESON_AXG_RESET_H 14*78a08019SNeil Armstrong 15*78a08019SNeil Armstrong /* RESET0 */ 16*78a08019SNeil Armstrong #define RESET_HIU 0 17*78a08019SNeil Armstrong #define RESET_PCIE_A 1 18*78a08019SNeil Armstrong #define RESET_PCIE_B 2 19*78a08019SNeil Armstrong #define RESET_DDR_TOP 3 20*78a08019SNeil Armstrong /* 4 */ 21*78a08019SNeil Armstrong #define RESET_VIU 5 22*78a08019SNeil Armstrong #define RESET_PCIE_PHY 6 23*78a08019SNeil Armstrong #define RESET_PCIE_APB 7 24*78a08019SNeil Armstrong /* 8 */ 25*78a08019SNeil Armstrong /* 9 */ 26*78a08019SNeil Armstrong #define RESET_VENC 10 27*78a08019SNeil Armstrong #define RESET_ASSIST 11 28*78a08019SNeil Armstrong /* 12 */ 29*78a08019SNeil Armstrong #define RESET_VCBUS 13 30*78a08019SNeil Armstrong /* 14 */ 31*78a08019SNeil Armstrong /* 15 */ 32*78a08019SNeil Armstrong #define RESET_GIC 16 33*78a08019SNeil Armstrong #define RESET_CAPB3_DECODE 17 34*78a08019SNeil Armstrong /* 18-21 */ 35*78a08019SNeil Armstrong #define RESET_SYS_CPU_CAPB3 22 36*78a08019SNeil Armstrong #define RESET_CBUS_CAPB3 23 37*78a08019SNeil Armstrong #define RESET_AHB_CNTL 24 38*78a08019SNeil Armstrong #define RESET_AHB_DATA 25 39*78a08019SNeil Armstrong #define RESET_VCBUS_CLK81 26 40*78a08019SNeil Armstrong #define RESET_MMC 27 41*78a08019SNeil Armstrong /* 28-31 */ 42*78a08019SNeil Armstrong /* RESET1 */ 43*78a08019SNeil Armstrong /* 32 */ 44*78a08019SNeil Armstrong /* 33 */ 45*78a08019SNeil Armstrong #define RESET_USB_OTG 34 46*78a08019SNeil Armstrong #define RESET_DDR 35 47*78a08019SNeil Armstrong #define RESET_AO_RESET 36 48*78a08019SNeil Armstrong /* 37 */ 49*78a08019SNeil Armstrong #define RESET_AHB_SRAM 38 50*78a08019SNeil Armstrong /* 39 */ 51*78a08019SNeil Armstrong /* 40 */ 52*78a08019SNeil Armstrong #define RESET_DMA 41 53*78a08019SNeil Armstrong #define RESET_ISA 42 54*78a08019SNeil Armstrong #define RESET_ETHERNET 43 55*78a08019SNeil Armstrong /* 44 */ 56*78a08019SNeil Armstrong #define RESET_SD_EMMC_B 45 57*78a08019SNeil Armstrong #define RESET_SD_EMMC_C 46 58*78a08019SNeil Armstrong #define RESET_ROM_BOOT 47 59*78a08019SNeil Armstrong #define RESET_SYS_CPU_0 48 60*78a08019SNeil Armstrong #define RESET_SYS_CPU_1 49 61*78a08019SNeil Armstrong #define RESET_SYS_CPU_2 50 62*78a08019SNeil Armstrong #define RESET_SYS_CPU_3 51 63*78a08019SNeil Armstrong #define RESET_SYS_CPU_CORE_0 52 64*78a08019SNeil Armstrong #define RESET_SYS_CPU_CORE_1 53 65*78a08019SNeil Armstrong #define RESET_SYS_CPU_CORE_2 54 66*78a08019SNeil Armstrong #define RESET_SYS_CPU_CORE_3 55 67*78a08019SNeil Armstrong #define RESET_SYS_PLL_DIV 56 68*78a08019SNeil Armstrong #define RESET_SYS_CPU_AXI 57 69*78a08019SNeil Armstrong #define RESET_SYS_CPU_L2 58 70*78a08019SNeil Armstrong #define RESET_SYS_CPU_P 59 71*78a08019SNeil Armstrong #define RESET_SYS_CPU_MBIST 60 72*78a08019SNeil Armstrong /* 61-63 */ 73*78a08019SNeil Armstrong /* RESET2 */ 74*78a08019SNeil Armstrong /* 64 */ 75*78a08019SNeil Armstrong /* 65 */ 76*78a08019SNeil Armstrong #define RESET_AUDIO 66 77*78a08019SNeil Armstrong /* 67 */ 78*78a08019SNeil Armstrong #define RESET_MIPI_HOST 68 79*78a08019SNeil Armstrong #define RESET_AUDIO_LOCKER 69 80*78a08019SNeil Armstrong #define RESET_GE2D 70 81*78a08019SNeil Armstrong /* 71-76 */ 82*78a08019SNeil Armstrong #define RESET_AO_CPU_RESET 77 83*78a08019SNeil Armstrong /* 78-95 */ 84*78a08019SNeil Armstrong /* RESET3 */ 85*78a08019SNeil Armstrong #define RESET_RING_OSCILLATOR 96 86*78a08019SNeil Armstrong /* 97-127 */ 87*78a08019SNeil Armstrong /* RESET4 */ 88*78a08019SNeil Armstrong /* 128 */ 89*78a08019SNeil Armstrong /* 129 */ 90*78a08019SNeil Armstrong #define RESET_MIPI_PHY 130 91*78a08019SNeil Armstrong /* 131-140 */ 92*78a08019SNeil Armstrong #define RESET_VENCL 141 93*78a08019SNeil Armstrong #define RESET_I2C_MASTER_2 142 94*78a08019SNeil Armstrong #define RESET_I2C_MASTER_1 143 95*78a08019SNeil Armstrong /* 144-159 */ 96*78a08019SNeil Armstrong /* RESET5 */ 97*78a08019SNeil Armstrong /* 160-191 */ 98*78a08019SNeil Armstrong /* RESET6 */ 99*78a08019SNeil Armstrong #define RESET_PERIPHS_GENERAL 192 100*78a08019SNeil Armstrong #define RESET_PERIPHS_SPICC 193 101*78a08019SNeil Armstrong /* 194 */ 102*78a08019SNeil Armstrong /* 195 */ 103*78a08019SNeil Armstrong #define RESET_PERIPHS_I2C_MASTER_0 196 104*78a08019SNeil Armstrong /* 197-200 */ 105*78a08019SNeil Armstrong #define RESET_PERIPHS_UART_0 201 106*78a08019SNeil Armstrong #define RESET_PERIPHS_UART_1 202 107*78a08019SNeil Armstrong /* 203-204 */ 108*78a08019SNeil Armstrong #define RESET_PERIPHS_SPI_0 205 109*78a08019SNeil Armstrong #define RESET_PERIPHS_I2C_MASTER_3 206 110*78a08019SNeil Armstrong /* 207-223 */ 111*78a08019SNeil Armstrong /* RESET7 */ 112*78a08019SNeil Armstrong #define RESET_USB_DDR_0 224 113*78a08019SNeil Armstrong #define RESET_USB_DDR_1 225 114*78a08019SNeil Armstrong #define RESET_USB_DDR_2 226 115*78a08019SNeil Armstrong #define RESET_USB_DDR_3 227 116*78a08019SNeil Armstrong /* 228 */ 117*78a08019SNeil Armstrong #define RESET_DEVICE_MMC_ARB 229 118*78a08019SNeil Armstrong /* 230 */ 119*78a08019SNeil Armstrong #define RESET_VID_LOCK 231 120*78a08019SNeil Armstrong #define RESET_A9_DMC_PIPEL 232 121*78a08019SNeil Armstrong #define RESET_DMC_VPU_PIPEL 233 122*78a08019SNeil Armstrong /* 234-255 */ 123*78a08019SNeil Armstrong 124*78a08019SNeil Armstrong #endif 125