1*4157c472SMarek Vasut /* 2*4157c472SMarek Vasut * Copyright (C) 2016 Glider bvba 3*4157c472SMarek Vasut * 4*4157c472SMarek Vasut * This program is free software; you can redistribute it and/or modify 5*4157c472SMarek Vasut * it under the terms of the GNU General Public License as published by 6*4157c472SMarek Vasut * the Free Software Foundation; version 2 of the License. 7*4157c472SMarek Vasut */ 8*4157c472SMarek Vasut #ifndef __DT_BINDINGS_POWER_R8A7796_SYSC_H__ 9*4157c472SMarek Vasut #define __DT_BINDINGS_POWER_R8A7796_SYSC_H__ 10*4157c472SMarek Vasut 11*4157c472SMarek Vasut /* 12*4157c472SMarek Vasut * These power domain indices match the numbers of the interrupt bits 13*4157c472SMarek Vasut * representing the power areas in the various Interrupt Registers 14*4157c472SMarek Vasut * (e.g. SYSCISR, Interrupt Status Register) 15*4157c472SMarek Vasut */ 16*4157c472SMarek Vasut 17*4157c472SMarek Vasut #define R8A7796_PD_CA57_CPU0 0 18*4157c472SMarek Vasut #define R8A7796_PD_CA57_CPU1 1 19*4157c472SMarek Vasut #define R8A7796_PD_CA53_CPU0 5 20*4157c472SMarek Vasut #define R8A7796_PD_CA53_CPU1 6 21*4157c472SMarek Vasut #define R8A7796_PD_CA53_CPU2 7 22*4157c472SMarek Vasut #define R8A7796_PD_CA53_CPU3 8 23*4157c472SMarek Vasut #define R8A7796_PD_CA57_SCU 12 24*4157c472SMarek Vasut #define R8A7796_PD_CR7 13 25*4157c472SMarek Vasut #define R8A7796_PD_A3VC 14 26*4157c472SMarek Vasut #define R8A7796_PD_3DG_A 17 27*4157c472SMarek Vasut #define R8A7796_PD_3DG_B 18 28*4157c472SMarek Vasut #define R8A7796_PD_CA53_SCU 21 29*4157c472SMarek Vasut #define R8A7796_PD_A3IR 24 30*4157c472SMarek Vasut #define R8A7796_PD_A2VC0 25 31*4157c472SMarek Vasut #define R8A7796_PD_A2VC1 26 32*4157c472SMarek Vasut 33*4157c472SMarek Vasut /* Always-on power area */ 34*4157c472SMarek Vasut #define R8A7796_PD_ALWAYS_ON 32 35*4157c472SMarek Vasut 36*4157c472SMarek Vasut #endif /* __DT_BINDINGS_POWER_R8A7796_SYSC_H__ */ 37