1*83d290c5STom Rini /* SPDX-License-Identifier: GPL-2.0 */
22d91a977SSimon Glass /*
32d91a977SSimon Glass  * This header provides constants for OMAP pinctrl bindings.
42d91a977SSimon Glass  *
52d91a977SSimon Glass  * Copyright (C) 2009 Nokia
62d91a977SSimon Glass  * Copyright (C) 2009-2010 Texas Instruments
72d91a977SSimon Glass  */
82d91a977SSimon Glass 
92d91a977SSimon Glass #ifndef _DT_BINDINGS_PINCTRL_OMAP_H
102d91a977SSimon Glass #define _DT_BINDINGS_PINCTRL_OMAP_H
112d91a977SSimon Glass 
122d91a977SSimon Glass /* 34xx mux mode options for each pin. See TRM for options */
132d91a977SSimon Glass #define MUX_MODE0	0
142d91a977SSimon Glass #define MUX_MODE1	1
152d91a977SSimon Glass #define MUX_MODE2	2
162d91a977SSimon Glass #define MUX_MODE3	3
172d91a977SSimon Glass #define MUX_MODE4	4
182d91a977SSimon Glass #define MUX_MODE5	5
192d91a977SSimon Glass #define MUX_MODE6	6
202d91a977SSimon Glass #define MUX_MODE7	7
212d91a977SSimon Glass 
222d91a977SSimon Glass /* 24xx/34xx mux bit defines */
232d91a977SSimon Glass #define PULL_ENA		(1 << 3)
242d91a977SSimon Glass #define PULL_UP			(1 << 4)
252d91a977SSimon Glass #define ALTELECTRICALSEL	(1 << 5)
262d91a977SSimon Glass 
272d91a977SSimon Glass /* 34xx specific mux bit defines */
282d91a977SSimon Glass #define INPUT_EN		(1 << 8)
292d91a977SSimon Glass #define OFF_EN			(1 << 9)
302d91a977SSimon Glass #define OFFOUT_EN		(1 << 10)
312d91a977SSimon Glass #define OFFOUT_VAL		(1 << 11)
322d91a977SSimon Glass #define OFF_PULL_EN		(1 << 12)
332d91a977SSimon Glass #define OFF_PULL_UP		(1 << 13)
342d91a977SSimon Glass #define WAKEUP_EN		(1 << 14)
352d91a977SSimon Glass 
362d91a977SSimon Glass /* 44xx specific mux bit defines */
372d91a977SSimon Glass #define WAKEUP_EVENT		(1 << 15)
382d91a977SSimon Glass 
392d91a977SSimon Glass /* Active pin states */
402d91a977SSimon Glass #define PIN_OUTPUT		0
412d91a977SSimon Glass #define PIN_OUTPUT_PULLUP	(PIN_OUTPUT | PULL_ENA | PULL_UP)
422d91a977SSimon Glass #define PIN_OUTPUT_PULLDOWN	(PIN_OUTPUT | PULL_ENA)
432d91a977SSimon Glass #define PIN_INPUT		INPUT_EN
442d91a977SSimon Glass #define PIN_INPUT_PULLUP	(PULL_ENA | INPUT_EN | PULL_UP)
452d91a977SSimon Glass #define PIN_INPUT_PULLDOWN	(PULL_ENA | INPUT_EN)
462d91a977SSimon Glass 
472d91a977SSimon Glass /* Off mode states */
482d91a977SSimon Glass #define PIN_OFF_NONE		0
492d91a977SSimon Glass #define PIN_OFF_OUTPUT_HIGH	(OFF_EN | OFFOUT_EN | OFFOUT_VAL)
502d91a977SSimon Glass #define PIN_OFF_OUTPUT_LOW	(OFF_EN | OFFOUT_EN)
512d91a977SSimon Glass #define PIN_OFF_INPUT_PULLUP	(OFF_EN | OFF_PULL_EN | OFF_PULL_UP)
522d91a977SSimon Glass #define PIN_OFF_INPUT_PULLDOWN	(OFF_EN | OFF_PULL_EN)
532d91a977SSimon Glass #define PIN_OFF_WAKEUPENABLE	WAKEUP_EN
542d91a977SSimon Glass 
553819ea70SLokesh Vutla /*
563819ea70SLokesh Vutla  * Macros to allow using the absolute physical address instead of the
573819ea70SLokesh Vutla  * padconf registers instead of the offset from padconf base.
583819ea70SLokesh Vutla  */
593819ea70SLokesh Vutla #define OMAP_IOPAD_OFFSET(pa, offset)	(((pa) & 0xffff) - (offset))
603819ea70SLokesh Vutla 
613819ea70SLokesh Vutla #define OMAP2420_CORE_IOPAD(pa, val)	OMAP_IOPAD_OFFSET((pa), 0x0030) (val)
623819ea70SLokesh Vutla #define OMAP2430_CORE_IOPAD(pa, val)	OMAP_IOPAD_OFFSET((pa), 0x2030) (val)
633819ea70SLokesh Vutla #define OMAP3_CORE1_IOPAD(pa, val)	OMAP_IOPAD_OFFSET((pa), 0x2030) (val)
643819ea70SLokesh Vutla #define OMAP3430_CORE2_IOPAD(pa, val)	OMAP_IOPAD_OFFSET((pa), 0x25d8) (val)
653819ea70SLokesh Vutla #define OMAP3630_CORE2_IOPAD(pa, val)	OMAP_IOPAD_OFFSET((pa), 0x25a0) (val)
663819ea70SLokesh Vutla #define OMAP3_WKUP_IOPAD(pa, val)	OMAP_IOPAD_OFFSET((pa), 0x2a00) (val)
673819ea70SLokesh Vutla #define DM814X_IOPAD(pa, val)		OMAP_IOPAD_OFFSET((pa), 0x0800) (val)
683819ea70SLokesh Vutla #define DM816X_IOPAD(pa, val)		OMAP_IOPAD_OFFSET((pa), 0x0800) (val)
693819ea70SLokesh Vutla #define AM33XX_IOPAD(pa, val)		OMAP_IOPAD_OFFSET((pa), 0x0800) (val)
703819ea70SLokesh Vutla 
713819ea70SLokesh Vutla /*
723819ea70SLokesh Vutla  * Macros to allow using the offset from the padconf physical address
733819ea70SLokesh Vutla  * instead  of the offset from padconf base.
743819ea70SLokesh Vutla  */
753819ea70SLokesh Vutla #define OMAP_PADCONF_OFFSET(offset, base_offset)	((offset) - (base_offset))
763819ea70SLokesh Vutla 
773819ea70SLokesh Vutla #define OMAP4_IOPAD(offset, val)	OMAP_PADCONF_OFFSET((offset), 0x0040) (val)
783819ea70SLokesh Vutla #define OMAP5_IOPAD(offset, val)	OMAP_PADCONF_OFFSET((offset), 0x0040) (val)
793819ea70SLokesh Vutla 
803819ea70SLokesh Vutla /*
813819ea70SLokesh Vutla  * Define some commonly used pins configured by the boards.
823819ea70SLokesh Vutla  * Note that some boards use alternative pins, so check
833819ea70SLokesh Vutla  * the schematics before using these.
843819ea70SLokesh Vutla  */
853819ea70SLokesh Vutla #define OMAP3_UART1_RX		0x152
863819ea70SLokesh Vutla #define OMAP3_UART2_RX		0x14a
873819ea70SLokesh Vutla #define OMAP3_UART3_RX		0x16e
883819ea70SLokesh Vutla #define OMAP4_UART2_RX		0xdc
893819ea70SLokesh Vutla #define OMAP4_UART3_RX		0x104
903819ea70SLokesh Vutla #define OMAP4_UART4_RX		0x11c
913819ea70SLokesh Vutla 
922d91a977SSimon Glass #endif
932d91a977SSimon Glass 
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