12d91a977SSimon Glass /* 22d91a977SSimon Glass * This header provides constants for OMAP pinctrl bindings. 32d91a977SSimon Glass * 42d91a977SSimon Glass * Copyright (C) 2009 Nokia 52d91a977SSimon Glass * Copyright (C) 2009-2010 Texas Instruments 6f41d6b7dSSimon Glass * 7f41d6b7dSSimon Glass * SPDX-License-Identifier: GPL-2.0 82d91a977SSimon Glass */ 92d91a977SSimon Glass 102d91a977SSimon Glass #ifndef _DT_BINDINGS_PINCTRL_OMAP_H 112d91a977SSimon Glass #define _DT_BINDINGS_PINCTRL_OMAP_H 122d91a977SSimon Glass 132d91a977SSimon Glass /* 34xx mux mode options for each pin. See TRM for options */ 142d91a977SSimon Glass #define MUX_MODE0 0 152d91a977SSimon Glass #define MUX_MODE1 1 162d91a977SSimon Glass #define MUX_MODE2 2 172d91a977SSimon Glass #define MUX_MODE3 3 182d91a977SSimon Glass #define MUX_MODE4 4 192d91a977SSimon Glass #define MUX_MODE5 5 202d91a977SSimon Glass #define MUX_MODE6 6 212d91a977SSimon Glass #define MUX_MODE7 7 222d91a977SSimon Glass 232d91a977SSimon Glass /* 24xx/34xx mux bit defines */ 242d91a977SSimon Glass #define PULL_ENA (1 << 3) 252d91a977SSimon Glass #define PULL_UP (1 << 4) 262d91a977SSimon Glass #define ALTELECTRICALSEL (1 << 5) 272d91a977SSimon Glass 282d91a977SSimon Glass /* 34xx specific mux bit defines */ 292d91a977SSimon Glass #define INPUT_EN (1 << 8) 302d91a977SSimon Glass #define OFF_EN (1 << 9) 312d91a977SSimon Glass #define OFFOUT_EN (1 << 10) 322d91a977SSimon Glass #define OFFOUT_VAL (1 << 11) 332d91a977SSimon Glass #define OFF_PULL_EN (1 << 12) 342d91a977SSimon Glass #define OFF_PULL_UP (1 << 13) 352d91a977SSimon Glass #define WAKEUP_EN (1 << 14) 362d91a977SSimon Glass 372d91a977SSimon Glass /* 44xx specific mux bit defines */ 382d91a977SSimon Glass #define WAKEUP_EVENT (1 << 15) 392d91a977SSimon Glass 402d91a977SSimon Glass /* Active pin states */ 412d91a977SSimon Glass #define PIN_OUTPUT 0 422d91a977SSimon Glass #define PIN_OUTPUT_PULLUP (PIN_OUTPUT | PULL_ENA | PULL_UP) 432d91a977SSimon Glass #define PIN_OUTPUT_PULLDOWN (PIN_OUTPUT | PULL_ENA) 442d91a977SSimon Glass #define PIN_INPUT INPUT_EN 452d91a977SSimon Glass #define PIN_INPUT_PULLUP (PULL_ENA | INPUT_EN | PULL_UP) 462d91a977SSimon Glass #define PIN_INPUT_PULLDOWN (PULL_ENA | INPUT_EN) 472d91a977SSimon Glass 482d91a977SSimon Glass /* Off mode states */ 492d91a977SSimon Glass #define PIN_OFF_NONE 0 502d91a977SSimon Glass #define PIN_OFF_OUTPUT_HIGH (OFF_EN | OFFOUT_EN | OFFOUT_VAL) 512d91a977SSimon Glass #define PIN_OFF_OUTPUT_LOW (OFF_EN | OFFOUT_EN) 522d91a977SSimon Glass #define PIN_OFF_INPUT_PULLUP (OFF_EN | OFF_PULL_EN | OFF_PULL_UP) 532d91a977SSimon Glass #define PIN_OFF_INPUT_PULLDOWN (OFF_EN | OFF_PULL_EN) 542d91a977SSimon Glass #define PIN_OFF_WAKEUPENABLE WAKEUP_EN 552d91a977SSimon Glass 56*3819ea70SLokesh Vutla /* 57*3819ea70SLokesh Vutla * Macros to allow using the absolute physical address instead of the 58*3819ea70SLokesh Vutla * padconf registers instead of the offset from padconf base. 59*3819ea70SLokesh Vutla */ 60*3819ea70SLokesh Vutla #define OMAP_IOPAD_OFFSET(pa, offset) (((pa) & 0xffff) - (offset)) 61*3819ea70SLokesh Vutla 62*3819ea70SLokesh Vutla #define OMAP2420_CORE_IOPAD(pa, val) OMAP_IOPAD_OFFSET((pa), 0x0030) (val) 63*3819ea70SLokesh Vutla #define OMAP2430_CORE_IOPAD(pa, val) OMAP_IOPAD_OFFSET((pa), 0x2030) (val) 64*3819ea70SLokesh Vutla #define OMAP3_CORE1_IOPAD(pa, val) OMAP_IOPAD_OFFSET((pa), 0x2030) (val) 65*3819ea70SLokesh Vutla #define OMAP3430_CORE2_IOPAD(pa, val) OMAP_IOPAD_OFFSET((pa), 0x25d8) (val) 66*3819ea70SLokesh Vutla #define OMAP3630_CORE2_IOPAD(pa, val) OMAP_IOPAD_OFFSET((pa), 0x25a0) (val) 67*3819ea70SLokesh Vutla #define OMAP3_WKUP_IOPAD(pa, val) OMAP_IOPAD_OFFSET((pa), 0x2a00) (val) 68*3819ea70SLokesh Vutla #define DM814X_IOPAD(pa, val) OMAP_IOPAD_OFFSET((pa), 0x0800) (val) 69*3819ea70SLokesh Vutla #define DM816X_IOPAD(pa, val) OMAP_IOPAD_OFFSET((pa), 0x0800) (val) 70*3819ea70SLokesh Vutla #define AM33XX_IOPAD(pa, val) OMAP_IOPAD_OFFSET((pa), 0x0800) (val) 71*3819ea70SLokesh Vutla 72*3819ea70SLokesh Vutla /* 73*3819ea70SLokesh Vutla * Macros to allow using the offset from the padconf physical address 74*3819ea70SLokesh Vutla * instead of the offset from padconf base. 75*3819ea70SLokesh Vutla */ 76*3819ea70SLokesh Vutla #define OMAP_PADCONF_OFFSET(offset, base_offset) ((offset) - (base_offset)) 77*3819ea70SLokesh Vutla 78*3819ea70SLokesh Vutla #define OMAP4_IOPAD(offset, val) OMAP_PADCONF_OFFSET((offset), 0x0040) (val) 79*3819ea70SLokesh Vutla #define OMAP5_IOPAD(offset, val) OMAP_PADCONF_OFFSET((offset), 0x0040) (val) 80*3819ea70SLokesh Vutla 81*3819ea70SLokesh Vutla /* 82*3819ea70SLokesh Vutla * Define some commonly used pins configured by the boards. 83*3819ea70SLokesh Vutla * Note that some boards use alternative pins, so check 84*3819ea70SLokesh Vutla * the schematics before using these. 85*3819ea70SLokesh Vutla */ 86*3819ea70SLokesh Vutla #define OMAP3_UART1_RX 0x152 87*3819ea70SLokesh Vutla #define OMAP3_UART2_RX 0x14a 88*3819ea70SLokesh Vutla #define OMAP3_UART3_RX 0x16e 89*3819ea70SLokesh Vutla #define OMAP4_UART2_RX 0xdc 90*3819ea70SLokesh Vutla #define OMAP4_UART3_RX 0x104 91*3819ea70SLokesh Vutla #define OMAP4_UART4_RX 0x11c 92*3819ea70SLokesh Vutla 932d91a977SSimon Glass #endif 942d91a977SSimon Glass 95