1/* SPDX-License-Identifier: GPL-2.0+ */ 2/* 3 * (C) Copyright 2008 - 2013 Tensilica, Inc. 4 * (C) Copyright 2014 - 2016 Cadence Design Systems Inc. 5 */ 6 7#include <config.h> 8#include <asm/ldscript.h> 9#include <asm/arch/core.h> 10#include <asm/addrspace.h> 11#include <asm-offsets.h> 12 13OUTPUT_ARCH(xtensa) 14ENTRY(_start) 15 16/* 17 * U-Boot resets from SYSROM and unpacks itself from a ROM store to RAM. 18 * The reset vector is usually near the base of SYSROM and has room 19 * above it for the ROM store into which the rest of U-Boot is packed. 20 * The ROM store also needs to be above any other vectors that are in ROM. 21 * If a core has its vectors near the top of ROM, this must be edited. 22 * 23 * Note that to run C code out of ROM, the processor would have to support 24 * 'relocatable' exception vectors and provide a scratch memory for the 25 * initial stack. Not all Xtensa processor configurations support that, so 26 * we can simplify the boot process and unpack U-Boot to RAM immediately. 27 * This, however, requires that memory have been initialized throug some 28 * other means (serial ROM, for example) or are initialized early (requiring 29 * an assembler function. See start.S for more details) 30 */ 31 32SECTIONS 33{ 34 . = + SIZEOF_HEADERS; 35 SECTION_ResetVector(XCHAL_RESET_VECTOR_VADDR, LMA_EQ_VMA) 36 37 .reloc_table ALIGN(4) : FOLLOWING(.ResetVector.text) 38 { 39 __reloc_table_start = ABSOLUTE(.); 40#if XCHAL_HAVE_WINDOWED 41 RELOCATE2(WindowVectors,text); 42#endif 43 RELOCATE2(KernelExceptionVector,literal); 44 RELOCATE2(KernelExceptionVector,text); 45 RELOCATE2(UserExceptionVector,literal); 46 RELOCATE2(UserExceptionVector,text); 47 RELOCATE2(DoubleExceptionVector,literal); 48 RELOCATE2(DoubleExceptionVector,text); 49 RELOCATE1(text); 50 RELOCATE1(rodata); 51 RELOCATE1(data); 52 RELOCATE1(u_boot_list); 53 __reloc_table_end = ABSOLUTE(.); 54 } 55 56#if XCHAL_HAVE_WINDOWED 57 SECTION_VECTOR(WindowVectors,text,XCHAL_WINDOW_VECTORS_VADDR, 58 FOLLOWING(.reloc_table)) 59 SECTION_VECTOR(KernelExceptionVector,literal,XCHAL_KERNEL_VECTOR_VADDR-8, 60 FOLLOWING(.WindowVectors.text)) 61#else 62 SECTION_VECTOR(KernelExceptionVector,literal,XCHAL_KERNEL_VECTOR_VADDR-8, 63 FOLLOWING(.reloc_table)) 64#endif 65 SECTION_VECTOR(KernelExceptionVector,text,XCHAL_KERNEL_VECTOR_VADDR, 66 FOLLOWING(.KernelExceptionVector.literal)) 67 SECTION_VECTOR(UserExceptionVector,literal,XCHAL_USER_VECTOR_VADDR-8, 68 FOLLOWING(.KernelExceptionVector.text)) 69 SECTION_VECTOR(UserExceptionVector,text,XCHAL_USER_VECTOR_VADDR, 70 FOLLOWING(.UserExceptionVector.literal)) 71 SECTION_VECTOR(DoubleExceptionVector,literal,XCHAL_DOUBLEEXC_VECTOR_VADDR-8, 72 FOLLOWING(.UserExceptionVector.text)) 73 SECTION_VECTOR(DoubleExceptionVector,text,XCHAL_DOUBLEEXC_VECTOR_VADDR, 74 FOLLOWING(.DoubleExceptionVector.literal)) 75 76 __monitor_start = XTENSA_SYS_TEXT_ADDR; 77 78 SECTION_text(XTENSA_SYS_TEXT_ADDR, FOLLOWING(.DoubleExceptionVector.text)) 79 SECTION_rodata(ALIGN(16), FOLLOWING(.text)) 80 SECTION_u_boot_list(ALIGN(16), FOLLOWING(.rodata)) 81 SECTION_data(ALIGN(16), FOLLOWING(.u_boot_list)) 82 83 __reloc_end = .; 84 __init_end = .; 85 86 SECTION_bss(__init_end (OVERLAY),) 87 88 __monitor_end = .; 89 90 /* 91 * On many Xtensa boards a region of RAM may be mapped to the ROM address 92 * space to facilitate on-chip-debug, and U-Boot must fit with that region. 93 * The config variables CONFIG_SYS_MONITOR_* define the region. 94 * If U-Boot extends beyond this region it will appear discontiguous in the 95 * address space and is in danger of overwriting itself during unpacking 96 * ("relocation"). 97 * This causes U-Boot to crash in a way that is difficult to debug. On some 98 * boards (such as xtav60) the region is small enough that U-Boot will not 99 * fit if compiled entirely with -O0 (a common scenario). To avoid a lengthy 100 * debugging session when this happens, ensure a link-time error occurs. 101 * 102 */ 103 104 ASSERT(__monitor_end - __monitor_start <= CONFIG_SYS_MONITOR_LEN, 105 "U-Boot ROM image is too large. Check optimization level.") 106 107 SECTION_xtensa 108 SECTION_debug 109 110 /DISCARD/ : { *(.dynstr*) } 111 /DISCARD/ : { *(.hash*) } 112 /DISCARD/ : { *(.interp) } 113 /DISCARD/ : { *(.got*) } 114 /DISCARD/ : { *(.dynsym) } 115} 116