1/* 2 * (C) Copyright 2008 - 2013 Tensilica, Inc. 3 * (C) Copyright 2014 - 2016 Cadence Design Systems Inc. 4 * 5 * SPDX-License-Identifier: GPL-2.0+ 6 */ 7 8#include <config.h> 9#include <asm/ldscript.h> 10#include <asm/arch/core.h> 11#include <asm/addrspace.h> 12#include <asm-offsets.h> 13 14OUTPUT_ARCH(xtensa) 15ENTRY(_start) 16 17/* 18 * U-Boot resets from SYSROM and unpacks itself from a ROM store to RAM. 19 * The reset vector is usually near the base of SYSROM and has room 20 * above it for the ROM store into which the rest of U-Boot is packed. 21 * The ROM store also needs to be above any other vectors that are in ROM. 22 * If a core has its vectors near the top of ROM, this must be edited. 23 * 24 * Note that to run C code out of ROM, the processor would have to support 25 * 'relocatable' exception vectors and provide a scratch memory for the 26 * initial stack. Not all Xtensa processor configurations support that, so 27 * we can simplify the boot process and unpack U-Boot to RAM immediately. 28 * This, however, requires that memory have been initialized throug some 29 * other means (serial ROM, for example) or are initialized early (requiring 30 * an assembler function. See start.S for more details) 31 */ 32 33SECTIONS 34{ 35 . = + SIZEOF_HEADERS; 36 SECTION_ResetVector(XCHAL_RESET_VECTOR_VADDR, LMA_EQ_VMA) 37 38 .reloc_table ALIGN(4) : FOLLOWING(.ResetVector.text) 39 { 40 __reloc_table_start = ABSOLUTE(.); 41#if XCHAL_HAVE_WINDOWED 42 RELOCATE2(WindowVectors,text); 43#endif 44 RELOCATE2(KernelExceptionVector,literal); 45 RELOCATE2(KernelExceptionVector,text); 46 RELOCATE2(UserExceptionVector,literal); 47 RELOCATE2(UserExceptionVector,text); 48 RELOCATE2(DoubleExceptionVector,literal); 49 RELOCATE2(DoubleExceptionVector,text); 50 RELOCATE1(text); 51 RELOCATE1(rodata); 52 RELOCATE1(data); 53 RELOCATE1(u_boot_list); 54 __reloc_table_end = ABSOLUTE(.); 55 } 56 57#if XCHAL_HAVE_WINDOWED 58 SECTION_VECTOR(WindowVectors,text,XCHAL_WINDOW_VECTORS_VADDR, 59 FOLLOWING(.reloc_table)) 60 SECTION_VECTOR(KernelExceptionVector,literal,XCHAL_KERNEL_VECTOR_VADDR-8, 61 FOLLOWING(.WindowVectors.text)) 62#else 63 SECTION_VECTOR(KernelExceptionVector,literal,XCHAL_KERNEL_VECTOR_VADDR-8, 64 FOLLOWING(.reloc_table)) 65#endif 66 SECTION_VECTOR(KernelExceptionVector,text,XCHAL_KERNEL_VECTOR_VADDR, 67 FOLLOWING(.KernelExceptionVector.literal)) 68 SECTION_VECTOR(UserExceptionVector,literal,XCHAL_USER_VECTOR_VADDR-8, 69 FOLLOWING(.KernelExceptionVector.text)) 70 SECTION_VECTOR(UserExceptionVector,text,XCHAL_USER_VECTOR_VADDR, 71 FOLLOWING(.UserExceptionVector.literal)) 72 SECTION_VECTOR(DoubleExceptionVector,literal,XCHAL_DOUBLEEXC_VECTOR_VADDR-8, 73 FOLLOWING(.UserExceptionVector.text)) 74 SECTION_VECTOR(DoubleExceptionVector,text,XCHAL_DOUBLEEXC_VECTOR_VADDR, 75 FOLLOWING(.DoubleExceptionVector.literal)) 76 77 __monitor_start = XTENSA_SYS_TEXT_ADDR; 78 79 SECTION_text(XTENSA_SYS_TEXT_ADDR, FOLLOWING(.DoubleExceptionVector.text)) 80 SECTION_rodata(ALIGN(16), FOLLOWING(.text)) 81 SECTION_u_boot_list(ALIGN(16), FOLLOWING(.rodata)) 82 SECTION_data(ALIGN(16), FOLLOWING(.u_boot_list)) 83 84 __reloc_end = .; 85 __init_end = .; 86 87 SECTION_bss(__init_end (OVERLAY),) 88 89 __monitor_end = .; 90 91 /* 92 * On many Xtensa boards a region of RAM may be mapped to the ROM address 93 * space to facilitate on-chip-debug, and U-Boot must fit with that region. 94 * The config variables CONFIG_SYS_MONITOR_* define the region. 95 * If U-Boot extends beyond this region it will appear discontiguous in the 96 * address space and is in danger of overwriting itself during unpacking 97 * ("relocation"). 98 * This causes U-Boot to crash in a way that is difficult to debug. On some 99 * boards (such as xtav60) the region is small enough that U-Boot will not 100 * fit if compiled entirely with -O0 (a common scenario). To avoid a lengthy 101 * debugging session when this happens, ensure a link-time error occurs. 102 * 103 */ 104 105 ASSERT(__monitor_end - __monitor_start <= CONFIG_SYS_MONITOR_LEN, 106 "U-Boot ROM image is too large. Check optimization level.") 107 108 SECTION_xtensa 109 SECTION_debug 110 111 /DISCARD/ : { *(.dynstr*) } 112 /DISCARD/ : { *(.hash*) } 113 /DISCARD/ : { *(.interp) } 114 /DISCARD/ : { *(.got*) } 115 /DISCARD/ : { *(.dynsym) } 116} 117