1 /* 2 * Copyright (c) 2016 Google, Inc 3 * 4 * SPDX-License-Identifier: GPL-2.0 5 */ 6 7 #include <common.h> 8 #include <debug_uart.h> 9 #include <init_helpers.h> 10 #include <spl.h> 11 #include <asm/cpu.h> 12 #include <asm/mtrr.h> 13 #include <asm/processor.h> 14 #include <asm-generic/sections.h> 15 16 DECLARE_GLOBAL_DATA_PTR; 17 18 __weak int arch_cpu_init_dm(void) 19 { 20 return 0; 21 } 22 23 static int x86_spl_init(void) 24 { 25 /* 26 * TODO(sjg@chromium.org): We use this area of RAM for the stack 27 * and global_data in SPL. Once U-Boot starts up and releocates it 28 * is not needed. We could make this a CONFIG option or perhaps 29 * place it immediately below CONFIG_SYS_TEXT_BASE. 30 */ 31 char *ptr = (char *)0x110000; 32 int ret; 33 34 debug("%s starting\n", __func__); 35 ret = spl_init(); 36 if (ret) { 37 debug("%s: spl_init() failed\n", __func__); 38 return ret; 39 } 40 ret = arch_cpu_init(); 41 if (ret) { 42 debug("%s: arch_cpu_init() failed\n", __func__); 43 return ret; 44 } 45 ret = arch_cpu_init_dm(); 46 if (ret) { 47 debug("%s: arch_cpu_init_dm() failed\n", __func__); 48 return ret; 49 } 50 preloader_console_init(); 51 ret = print_cpuinfo(); 52 if (ret) { 53 debug("%s: print_cpuinfo() failed\n", __func__); 54 return ret; 55 } 56 ret = dram_init(); 57 if (ret) { 58 debug("%s: dram_init() failed\n", __func__); 59 return ret; 60 } 61 memset(&__bss_start, 0, (ulong)&__bss_end - (ulong)&__bss_start); 62 63 /* TODO(sjg@chromium.org): Consider calling cpu_init_r() here */ 64 ret = interrupt_init(); 65 if (ret) { 66 debug("%s: interrupt_init() failed\n", __func__); 67 return ret; 68 } 69 70 /* 71 * The stack grows down from ptr. Put the global data at ptr. This 72 * will only be used for SPL. Once SPL loads U-Boot proper it will 73 * set up its own stack. 74 */ 75 gd->new_gd = (struct global_data *)ptr; 76 memcpy(gd->new_gd, gd, sizeof(*gd)); 77 arch_setup_gd(gd->new_gd); 78 gd->start_addr_sp = (ulong)ptr; 79 80 /* Cache the SPI flash. Otherwise copying the code to RAM takes ages */ 81 ret = mtrr_add_request(MTRR_TYPE_WRBACK, 82 (1ULL << 32) - CONFIG_XIP_ROM_SIZE, 83 CONFIG_XIP_ROM_SIZE); 84 if (ret) { 85 debug("%s: SPI cache setup failed\n", __func__); 86 return ret; 87 } 88 89 return 0; 90 } 91 92 void board_init_f(ulong flags) 93 { 94 int ret; 95 96 ret = x86_spl_init(); 97 if (ret) { 98 debug("Error %d\n", ret); 99 hang(); 100 } 101 102 /* Uninit CAR and jump to board_init_f_r() */ 103 board_init_f_r_trampoline(gd->start_addr_sp); 104 } 105 106 void board_init_f_r(void) 107 { 108 init_cache_f_r(); 109 gd->flags &= ~GD_FLG_SERIAL_READY; 110 debug("cache status %d\n", dcache_status()); 111 board_init_r(gd, 0); 112 } 113 114 u32 spl_boot_device(void) 115 { 116 return BOOT_DEVICE_BOARD; 117 } 118 119 int spl_start_uboot(void) 120 { 121 return 0; 122 } 123 124 void spl_board_announce_boot_device(void) 125 { 126 printf("SPI flash"); 127 } 128 129 static int spl_board_load_image(struct spl_image_info *spl_image, 130 struct spl_boot_device *bootdev) 131 { 132 spl_image->size = CONFIG_SYS_MONITOR_LEN; 133 spl_image->entry_point = CONFIG_SYS_TEXT_BASE; 134 spl_image->load_addr = CONFIG_SYS_TEXT_BASE; 135 spl_image->os = IH_OS_U_BOOT; 136 spl_image->name = "U-Boot"; 137 138 debug("Loading to %lx\n", spl_image->load_addr); 139 140 return 0; 141 } 142 SPL_LOAD_IMAGE_METHOD("SPI", 0, BOOT_DEVICE_BOARD, spl_board_load_image); 143 144 int spl_spi_load_image(void) 145 { 146 return -EPERM; 147 } 148 149 void __noreturn jump_to_image_no_args(struct spl_image_info *spl_image) 150 { 151 int ret; 152 153 printf("Jumping to 64-bit U-Boot: Note many features are missing\n"); 154 ret = cpu_jump_to_64bit_uboot(spl_image->entry_point); 155 debug("ret=%d\n", ret); 156 while (1) 157 ; 158 } 159