1 /* 2 * Copyright (c) 2016 Google, Inc 3 * 4 * SPDX-License-Identifier: GPL-2.0 5 */ 6 7 #include <common.h> 8 #include <debug_uart.h> 9 #include <spl.h> 10 #include <asm/cpu.h> 11 #include <asm/mtrr.h> 12 #include <asm/processor.h> 13 #include <asm-generic/sections.h> 14 15 DECLARE_GLOBAL_DATA_PTR; 16 17 __weak int arch_cpu_init_dm(void) 18 { 19 return 0; 20 } 21 22 static int x86_spl_init(void) 23 { 24 /* 25 * TODO(sjg@chromium.org): We use this area of RAM for the stack 26 * and global_data in SPL. Once U-Boot starts up and releocates it 27 * is not needed. We could make this a CONFIG option or perhaps 28 * place it immediately below CONFIG_SYS_TEXT_BASE. 29 */ 30 char *ptr = (char *)0x110000; 31 int ret; 32 33 debug("%s starting\n", __func__); 34 ret = spl_init(); 35 if (ret) { 36 debug("%s: spl_init() failed\n", __func__); 37 return ret; 38 } 39 ret = arch_cpu_init(); 40 if (ret) { 41 debug("%s: arch_cpu_init() failed\n", __func__); 42 return ret; 43 } 44 ret = arch_cpu_init_dm(); 45 if (ret) { 46 debug("%s: arch_cpu_init_dm() failed\n", __func__); 47 return ret; 48 } 49 preloader_console_init(); 50 ret = print_cpuinfo(); 51 if (ret) { 52 debug("%s: print_cpuinfo() failed\n", __func__); 53 return ret; 54 } 55 ret = dram_init(); 56 if (ret) { 57 debug("%s: dram_init() failed\n", __func__); 58 return ret; 59 } 60 memset(&__bss_start, 0, (ulong)&__bss_end - (ulong)&__bss_start); 61 62 /* TODO(sjg@chromium.org): Consider calling cpu_init_r() here */ 63 ret = interrupt_init(); 64 if (ret) { 65 debug("%s: interrupt_init() failed\n", __func__); 66 return ret; 67 } 68 69 /* 70 * The stack grows down from ptr. Put the global data at ptr. This 71 * will only be used for SPL. Once SPL loads U-Boot proper it will 72 * set up its own stack. 73 */ 74 gd->new_gd = (struct global_data *)ptr; 75 memcpy(gd->new_gd, gd, sizeof(*gd)); 76 arch_setup_gd(gd->new_gd); 77 gd->start_addr_sp = (ulong)ptr; 78 79 /* Cache the SPI flash. Otherwise copying the code to RAM takes ages */ 80 ret = mtrr_add_request(MTRR_TYPE_WRBACK, 81 (1ULL << 32) - CONFIG_XIP_ROM_SIZE, 82 CONFIG_XIP_ROM_SIZE); 83 if (ret) { 84 debug("%s: SPI cache setup failed\n", __func__); 85 return ret; 86 } 87 88 return 0; 89 } 90 91 void board_init_f(ulong flags) 92 { 93 int ret; 94 95 ret = x86_spl_init(); 96 if (ret) { 97 debug("Error %d\n", ret); 98 hang(); 99 } 100 101 /* Uninit CAR and jump to board_init_f_r() */ 102 board_init_f_r_trampoline(gd->start_addr_sp); 103 } 104 105 void board_init_f_r(void) 106 { 107 init_cache_f_r(); 108 gd->flags &= ~GD_FLG_SERIAL_READY; 109 debug("cache status %d\n", dcache_status()); 110 board_init_r(gd, 0); 111 } 112 113 u32 spl_boot_device(void) 114 { 115 return BOOT_DEVICE_BOARD; 116 } 117 118 int spl_start_uboot(void) 119 { 120 return 0; 121 } 122 123 void spl_board_announce_boot_device(void) 124 { 125 printf("SPI flash"); 126 } 127 128 static int spl_board_load_image(struct spl_image_info *spl_image, 129 struct spl_boot_device *bootdev) 130 { 131 spl_image->size = CONFIG_SYS_MONITOR_LEN; 132 spl_image->entry_point = CONFIG_SYS_TEXT_BASE; 133 spl_image->load_addr = CONFIG_SYS_TEXT_BASE; 134 spl_image->os = IH_OS_U_BOOT; 135 spl_image->name = "U-Boot"; 136 137 debug("Loading to %lx\n", spl_image->load_addr); 138 139 return 0; 140 } 141 SPL_LOAD_IMAGE_METHOD("SPI", 0, BOOT_DEVICE_BOARD, spl_board_load_image); 142 143 int spl_spi_load_image(void) 144 { 145 return -EPERM; 146 } 147 148 void __noreturn jump_to_image_no_args(struct spl_image_info *spl_image) 149 { 150 int ret; 151 152 printf("Jumping to 64-bit U-Boot: Note many features are missing\n"); 153 ret = cpu_jump_to_64bit_uboot(spl_image->entry_point); 154 debug("ret=%d\n", ret); 155 while (1) 156 ; 157 } 158