1 /* 2 * Copyright (c) 2016 Google, Inc 3 * 4 * SPDX-License-Identifier: GPL-2.0 5 */ 6 7 #include <common.h> 8 #include <debug_uart.h> 9 #include <spl.h> 10 #include <asm/cpu.h> 11 #include <asm/init_helpers.h> 12 #include <asm/mtrr.h> 13 #include <asm/processor.h> 14 #include <asm-generic/sections.h> 15 16 DECLARE_GLOBAL_DATA_PTR; 17 18 static int x86_spl_init(void) 19 { 20 /* 21 * TODO(sjg@chromium.org): We use this area of RAM for the stack 22 * and global_data in SPL. Once U-Boot starts up and releocates it 23 * is not needed. We could make this a CONFIG option or perhaps 24 * place it immediately below CONFIG_SYS_TEXT_BASE. 25 */ 26 char *ptr = (char *)0x110000; 27 int ret; 28 29 debug("%s starting\n", __func__); 30 ret = spl_init(); 31 if (ret) { 32 debug("%s: spl_init() failed\n", __func__); 33 return ret; 34 } 35 preloader_console_init(); 36 37 ret = arch_cpu_init(); 38 if (ret) { 39 debug("%s: arch_cpu_init() failed\n", __func__); 40 return ret; 41 } 42 ret = arch_cpu_init_dm(); 43 if (ret) { 44 debug("%s: arch_cpu_init_dm() failed\n", __func__); 45 return ret; 46 } 47 ret = print_cpuinfo(); 48 if (ret) { 49 debug("%s: print_cpuinfo() failed\n", __func__); 50 return ret; 51 } 52 ret = dram_init(); 53 if (ret) { 54 debug("%s: dram_init() failed\n", __func__); 55 return ret; 56 } 57 memset(&__bss_start, 0, (ulong)&__bss_end - (ulong)&__bss_start); 58 59 /* TODO(sjg@chromium.org): Consider calling cpu_init_r() here */ 60 ret = interrupt_init(); 61 if (ret) { 62 debug("%s: interrupt_init() failed\n", __func__); 63 return ret; 64 } 65 66 /* 67 * The stack grows down from ptr. Put the global data at ptr. This 68 * will only be used for SPL. Once SPL loads U-Boot proper it will 69 * set up its own stack. 70 */ 71 gd->new_gd = (struct global_data *)ptr; 72 memcpy(gd->new_gd, gd, sizeof(*gd)); 73 arch_setup_gd(gd->new_gd); 74 gd->start_addr_sp = (ulong)ptr; 75 76 /* Cache the SPI flash. Otherwise copying the code to RAM takes ages */ 77 ret = mtrr_add_request(MTRR_TYPE_WRBACK, 78 (1ULL << 32) - CONFIG_XIP_ROM_SIZE, 79 CONFIG_XIP_ROM_SIZE); 80 if (ret) { 81 debug("%s: SPI cache setup failed\n", __func__); 82 return ret; 83 } 84 85 return 0; 86 } 87 88 void board_init_f(ulong flags) 89 { 90 int ret; 91 92 ret = x86_spl_init(); 93 if (ret) { 94 debug("Error %d\n", ret); 95 hang(); 96 } 97 98 /* Uninit CAR and jump to board_init_f_r() */ 99 board_init_f_r_trampoline(gd->start_addr_sp); 100 } 101 102 void board_init_f_r(void) 103 { 104 init_cache_f_r(); 105 gd->flags &= ~GD_FLG_SERIAL_READY; 106 debug("cache status %d\n", dcache_status()); 107 board_init_r(gd, 0); 108 } 109 110 u32 spl_boot_device(void) 111 { 112 return BOOT_DEVICE_BOARD; 113 } 114 115 int spl_start_uboot(void) 116 { 117 return 0; 118 } 119 120 void spl_board_announce_boot_device(void) 121 { 122 printf("SPI flash"); 123 } 124 125 static int spl_board_load_image(struct spl_image_info *spl_image, 126 struct spl_boot_device *bootdev) 127 { 128 spl_image->size = CONFIG_SYS_MONITOR_LEN; 129 spl_image->entry_point = CONFIG_SYS_TEXT_BASE; 130 spl_image->load_addr = CONFIG_SYS_TEXT_BASE; 131 spl_image->os = IH_OS_U_BOOT; 132 spl_image->name = "U-Boot"; 133 134 debug("Loading to %lx\n", spl_image->load_addr); 135 136 return 0; 137 } 138 SPL_LOAD_IMAGE_METHOD("SPI", 0, BOOT_DEVICE_BOARD, spl_board_load_image); 139 140 int spl_spi_load_image(void) 141 { 142 return -EPERM; 143 } 144 145 void __noreturn jump_to_image_no_args(struct spl_image_info *spl_image) 146 { 147 int ret; 148 149 printf("Jumping to 64-bit U-Boot: Note many features are missing\n"); 150 ret = cpu_jump_to_64bit_uboot(spl_image->entry_point); 151 debug("ret=%d\n", ret); 152 while (1) 153 ; 154 } 155