1 /* 2 * Copyright (c) 2016 Google, Inc 3 * 4 * SPDX-License-Identifier: GPL-2.0 5 */ 6 7 #include <common.h> 8 #include <debug_uart.h> 9 #include <init_helpers.h> 10 #include <spl.h> 11 #include <asm/cpu.h> 12 #include <asm/mtrr.h> 13 #include <asm/processor.h> 14 #include <asm-generic/sections.h> 15 16 DECLARE_GLOBAL_DATA_PTR; 17 18 __weak int arch_cpu_init_dm(void) 19 { 20 return 0; 21 } 22 23 static int x86_spl_init(void) 24 { 25 /* 26 * TODO(sjg@chromium.org): We use this area of RAM for the stack 27 * and global_data in SPL. Once U-Boot starts up and releocates it 28 * is not needed. We could make this a CONFIG option or perhaps 29 * place it immediately below CONFIG_SYS_TEXT_BASE. 30 */ 31 char *ptr = (char *)0x110000; 32 int ret; 33 34 debug("%s starting\n", __func__); 35 ret = spl_init(); 36 if (ret) { 37 debug("%s: spl_init() failed\n", __func__); 38 return ret; 39 } 40 preloader_console_init(); 41 42 ret = arch_cpu_init(); 43 if (ret) { 44 debug("%s: arch_cpu_init() failed\n", __func__); 45 return ret; 46 } 47 ret = arch_cpu_init_dm(); 48 if (ret) { 49 debug("%s: arch_cpu_init_dm() failed\n", __func__); 50 return ret; 51 } 52 ret = print_cpuinfo(); 53 if (ret) { 54 debug("%s: print_cpuinfo() failed\n", __func__); 55 return ret; 56 } 57 ret = dram_init(); 58 if (ret) { 59 debug("%s: dram_init() failed\n", __func__); 60 return ret; 61 } 62 memset(&__bss_start, 0, (ulong)&__bss_end - (ulong)&__bss_start); 63 64 /* TODO(sjg@chromium.org): Consider calling cpu_init_r() here */ 65 ret = interrupt_init(); 66 if (ret) { 67 debug("%s: interrupt_init() failed\n", __func__); 68 return ret; 69 } 70 71 /* 72 * The stack grows down from ptr. Put the global data at ptr. This 73 * will only be used for SPL. Once SPL loads U-Boot proper it will 74 * set up its own stack. 75 */ 76 gd->new_gd = (struct global_data *)ptr; 77 memcpy(gd->new_gd, gd, sizeof(*gd)); 78 arch_setup_gd(gd->new_gd); 79 gd->start_addr_sp = (ulong)ptr; 80 81 /* Cache the SPI flash. Otherwise copying the code to RAM takes ages */ 82 ret = mtrr_add_request(MTRR_TYPE_WRBACK, 83 (1ULL << 32) - CONFIG_XIP_ROM_SIZE, 84 CONFIG_XIP_ROM_SIZE); 85 if (ret) { 86 debug("%s: SPI cache setup failed\n", __func__); 87 return ret; 88 } 89 90 return 0; 91 } 92 93 void board_init_f(ulong flags) 94 { 95 int ret; 96 97 ret = x86_spl_init(); 98 if (ret) { 99 debug("Error %d\n", ret); 100 hang(); 101 } 102 103 /* Uninit CAR and jump to board_init_f_r() */ 104 board_init_f_r_trampoline(gd->start_addr_sp); 105 } 106 107 void board_init_f_r(void) 108 { 109 init_cache_f_r(); 110 gd->flags &= ~GD_FLG_SERIAL_READY; 111 debug("cache status %d\n", dcache_status()); 112 board_init_r(gd, 0); 113 } 114 115 u32 spl_boot_device(void) 116 { 117 return BOOT_DEVICE_BOARD; 118 } 119 120 int spl_start_uboot(void) 121 { 122 return 0; 123 } 124 125 void spl_board_announce_boot_device(void) 126 { 127 printf("SPI flash"); 128 } 129 130 static int spl_board_load_image(struct spl_image_info *spl_image, 131 struct spl_boot_device *bootdev) 132 { 133 spl_image->size = CONFIG_SYS_MONITOR_LEN; 134 spl_image->entry_point = CONFIG_SYS_TEXT_BASE; 135 spl_image->load_addr = CONFIG_SYS_TEXT_BASE; 136 spl_image->os = IH_OS_U_BOOT; 137 spl_image->name = "U-Boot"; 138 139 debug("Loading to %lx\n", spl_image->load_addr); 140 141 return 0; 142 } 143 SPL_LOAD_IMAGE_METHOD("SPI", 0, BOOT_DEVICE_BOARD, spl_board_load_image); 144 145 int spl_spi_load_image(void) 146 { 147 return -EPERM; 148 } 149 150 void __noreturn jump_to_image_no_args(struct spl_image_info *spl_image) 151 { 152 int ret; 153 154 printf("Jumping to 64-bit U-Boot: Note many features are missing\n"); 155 ret = cpu_jump_to_64bit_uboot(spl_image->entry_point); 156 debug("ret=%d\n", ret); 157 while (1) 158 ; 159 } 160