xref: /openbmc/u-boot/arch/x86/lib/mrccache.c (revision dd1033e4)
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3  * From coreboot src/southbridge/intel/bd82x6x/mrccache.c
4  *
5  * Copyright (C) 2014 Google Inc.
6  * Copyright (C) 2015 Bin Meng <bmeng.cn@gmail.com>
7  */
8 
9 #include <common.h>
10 #include <dm.h>
11 #include <errno.h>
12 #include <fdtdec.h>
13 #include <net.h>
14 #include <spi.h>
15 #include <spi_flash.h>
16 #include <asm/mrccache.h>
17 
18 DECLARE_GLOBAL_DATA_PTR;
19 
20 static struct mrc_data_container *next_mrc_block(
21 	struct mrc_data_container *cache)
22 {
23 	/* MRC data blocks are aligned within the region */
24 	u32 mrc_size = sizeof(*cache) + cache->data_size;
25 	u8 *region_ptr = (u8 *)cache;
26 
27 	if (mrc_size & (MRC_DATA_ALIGN - 1UL)) {
28 		mrc_size &= ~(MRC_DATA_ALIGN - 1UL);
29 		mrc_size += MRC_DATA_ALIGN;
30 	}
31 
32 	region_ptr += mrc_size;
33 
34 	return (struct mrc_data_container *)region_ptr;
35 }
36 
37 static int is_mrc_cache(struct mrc_data_container *cache)
38 {
39 	return cache && (cache->signature == MRC_DATA_SIGNATURE);
40 }
41 
42 struct mrc_data_container *mrccache_find_current(struct mrc_region *entry)
43 {
44 	struct mrc_data_container *cache, *next;
45 	ulong base_addr, end_addr;
46 	uint id;
47 
48 	base_addr = entry->base + entry->offset;
49 	end_addr = base_addr + entry->length;
50 	cache = NULL;
51 
52 	/* Search for the last filled entry in the region */
53 	for (id = 0, next = (struct mrc_data_container *)base_addr;
54 	     is_mrc_cache(next);
55 	     id++) {
56 		cache = next;
57 		next = next_mrc_block(next);
58 		if ((ulong)next >= end_addr)
59 			break;
60 	}
61 
62 	if (id-- == 0) {
63 		debug("%s: No valid MRC cache found.\n", __func__);
64 		return NULL;
65 	}
66 
67 	/* Verify checksum */
68 	if (cache->checksum != compute_ip_checksum(cache->data,
69 						   cache->data_size)) {
70 		printf("%s: MRC cache checksum mismatch\n", __func__);
71 		return NULL;
72 	}
73 
74 	debug("%s: picked entry %u from cache block\n", __func__, id);
75 
76 	return cache;
77 }
78 
79 /**
80  * find_next_mrc_cache() - get next cache entry
81  *
82  * @entry:	MRC cache flash area
83  * @cache:	Entry to start from
84  *
85  * @return next cache entry if found, NULL if we got to the end
86  */
87 static struct mrc_data_container *find_next_mrc_cache(struct mrc_region *entry,
88 		struct mrc_data_container *cache)
89 {
90 	ulong base_addr, end_addr;
91 
92 	base_addr = entry->base + entry->offset;
93 	end_addr = base_addr + entry->length;
94 
95 	cache = next_mrc_block(cache);
96 	if ((ulong)cache >= end_addr) {
97 		/* Crossed the boundary */
98 		cache = NULL;
99 		debug("%s: no available entries found\n", __func__);
100 	} else {
101 		debug("%s: picked next entry from cache block at %p\n",
102 		      __func__, cache);
103 	}
104 
105 	return cache;
106 }
107 
108 int mrccache_update(struct udevice *sf, struct mrc_region *entry,
109 		    struct mrc_data_container *cur)
110 {
111 	struct mrc_data_container *cache;
112 	ulong offset;
113 	ulong base_addr;
114 	int ret;
115 
116 	if (!is_mrc_cache(cur))
117 		return -EINVAL;
118 
119 	/* Find the last used block */
120 	base_addr = entry->base + entry->offset;
121 	debug("Updating MRC cache data\n");
122 	cache = mrccache_find_current(entry);
123 	if (cache && (cache->data_size == cur->data_size) &&
124 	    (!memcmp(cache, cur, cache->data_size + sizeof(*cur)))) {
125 		debug("MRC data in flash is up to date. No update\n");
126 		return -EEXIST;
127 	}
128 
129 	/* Move to the next block, which will be the first unused block */
130 	if (cache)
131 		cache = find_next_mrc_cache(entry, cache);
132 
133 	/*
134 	 * If we have got to the end, erase the entire mrc-cache area and start
135 	 * again at block 0.
136 	 */
137 	if (!cache) {
138 		debug("Erasing the MRC cache region of %x bytes at %x\n",
139 		      entry->length, entry->offset);
140 
141 		ret = spi_flash_erase_dm(sf, entry->offset, entry->length);
142 		if (ret) {
143 			debug("Failed to erase flash region\n");
144 			return ret;
145 		}
146 		cache = (struct mrc_data_container *)base_addr;
147 	}
148 
149 	/* Write the data out */
150 	offset = (ulong)cache - base_addr + entry->offset;
151 	debug("Write MRC cache update to flash at %lx\n", offset);
152 	ret = spi_flash_write_dm(sf, offset, cur->data_size + sizeof(*cur),
153 				 cur);
154 	if (ret) {
155 		debug("Failed to write to SPI flash\n");
156 		return ret;
157 	}
158 
159 	return 0;
160 }
161 
162 int mrccache_reserve(void)
163 {
164 	struct mrc_data_container *cache;
165 	u16 checksum;
166 
167 	if (!gd->arch.mrc_output_len)
168 		return 0;
169 
170 	/* adjust stack pointer to store pure cache data plus the header */
171 	gd->start_addr_sp -= (gd->arch.mrc_output_len + MRC_DATA_HEADER_SIZE);
172 	cache = (struct mrc_data_container *)gd->start_addr_sp;
173 
174 	cache->signature = MRC_DATA_SIGNATURE;
175 	cache->data_size = gd->arch.mrc_output_len;
176 	checksum = compute_ip_checksum(gd->arch.mrc_output, cache->data_size);
177 	debug("Saving %d bytes for MRC output data, checksum %04x\n",
178 	      cache->data_size, checksum);
179 	cache->checksum = checksum;
180 	cache->reserved = 0;
181 	memcpy(cache->data, gd->arch.mrc_output, cache->data_size);
182 
183 	/* gd->arch.mrc_output now points to the container */
184 	gd->arch.mrc_output = (char *)cache;
185 
186 	gd->start_addr_sp &= ~0xf;
187 
188 	return 0;
189 }
190 
191 int mrccache_get_region(struct udevice **devp, struct mrc_region *entry)
192 {
193 	const void *blob = gd->fdt_blob;
194 	int node, mrc_node;
195 	u32 reg[2];
196 	int ret;
197 
198 	/* Find the flash chip within the SPI controller node */
199 	node = fdtdec_next_compatible(blob, 0, COMPAT_GENERIC_SPI_FLASH);
200 	if (node < 0) {
201 		debug("%s: Cannot find SPI flash\n", __func__);
202 		return -ENOENT;
203 	}
204 
205 	if (fdtdec_get_int_array(blob, node, "memory-map", reg, 2))
206 		return -EINVAL;
207 	entry->base = reg[0];
208 
209 	/* Find the place where we put the MRC cache */
210 	mrc_node = fdt_subnode_offset(blob, node, "rw-mrc-cache");
211 	if (mrc_node < 0)
212 		return -EPERM;
213 
214 	if (fdtdec_get_int_array(blob, mrc_node, "reg", reg, 2))
215 		return -EINVAL;
216 	entry->offset = reg[0];
217 	entry->length = reg[1];
218 
219 	if (devp) {
220 		ret = uclass_get_device_by_of_offset(UCLASS_SPI_FLASH, node,
221 						     devp);
222 		debug("ret = %d\n", ret);
223 		if (ret)
224 			return ret;
225 	}
226 
227 	return 0;
228 }
229 
230 int mrccache_save(void)
231 {
232 	struct mrc_data_container *data;
233 	struct mrc_region entry;
234 	struct udevice *sf;
235 	int ret;
236 
237 	if (!gd->arch.mrc_output_len)
238 		return 0;
239 	debug("Saving %d bytes of MRC output data to SPI flash\n",
240 	      gd->arch.mrc_output_len);
241 
242 	ret = mrccache_get_region(&sf, &entry);
243 	if (ret)
244 		goto err_entry;
245 	data  = (struct mrc_data_container *)gd->arch.mrc_output;
246 	ret = mrccache_update(sf, &entry, data);
247 	if (!ret) {
248 		debug("Saved MRC data with checksum %04x\n", data->checksum);
249 	} else if (ret == -EEXIST) {
250 		debug("MRC data is the same as last time, skipping save\n");
251 		ret = 0;
252 	}
253 
254 err_entry:
255 	if (ret)
256 		debug("%s: Failed: %d\n", __func__, ret);
257 	return ret;
258 }
259