1 /* 2 * (C) Copyright 2011 3 * Graeme Russ, <graeme.russ@gmail.com> 4 * 5 * SPDX-License-Identifier: GPL-2.0+ 6 */ 7 8 #include <common.h> 9 #include <asm/errno.h> 10 #include <asm/mtrr.h> 11 12 DECLARE_GLOBAL_DATA_PTR; 13 14 /* Get the top of usable RAM */ 15 __weak ulong board_get_usable_ram_top(ulong total_size) 16 { 17 return gd->ram_size; 18 } 19 20 int init_cache_f_r(void) 21 { 22 #if defined(CONFIG_X86_RESET_VECTOR) & !defined(CONFIG_HAVE_FSP) 23 int ret; 24 25 ret = mtrr_commit(false); 26 /* If MTRR MSR is not implemented by the processor, just ignore it */ 27 if (ret && ret != -ENOSYS) 28 return ret; 29 #endif 30 /* Initialise the CPU cache(s) */ 31 return init_cache(); 32 } 33 34 bd_t bd_data; 35 36 int init_bd_struct_r(void) 37 { 38 gd->bd = &bd_data; 39 memset(gd->bd, 0, sizeof(bd_t)); 40 41 return 0; 42 } 43