xref: /openbmc/u-boot/arch/x86/lib/fsp/fsp_common.c (revision 038be18f)
1 /*
2  * Copyright (C) 2014, Bin Meng <bmeng.cn@gmail.com>
3  *
4  * SPDX-License-Identifier:	GPL-2.0+
5  */
6 
7 #include <common.h>
8 #include <errno.h>
9 #include <asm/io.h>
10 #include <asm/mrccache.h>
11 #include <asm/post.h>
12 #include <asm/processor.h>
13 #include <asm/fsp/fsp_support.h>
14 
15 DECLARE_GLOBAL_DATA_PTR;
16 
17 int print_cpuinfo(void)
18 {
19 	post_code(POST_CPU_INFO);
20 	return default_print_cpuinfo();
21 }
22 
23 int fsp_init_phase_pci(void)
24 {
25 	u32 status;
26 
27 	/* call into FspNotify */
28 	debug("Calling into FSP (notify phase INIT_PHASE_PCI): ");
29 	status = fsp_notify(NULL, INIT_PHASE_PCI);
30 	if (status)
31 		debug("fail, error code %x\n", status);
32 	else
33 		debug("OK\n");
34 
35 	return status ? -EPERM : 0;
36 }
37 
38 int board_pci_post_scan(struct pci_controller *hose)
39 {
40 	return fsp_init_phase_pci();
41 }
42 
43 void board_final_cleanup(void)
44 {
45 	u32 status;
46 
47 	/* call into FspNotify */
48 	debug("Calling into FSP (notify phase INIT_PHASE_BOOT): ");
49 	status = fsp_notify(NULL, INIT_PHASE_BOOT);
50 	if (status)
51 		debug("fail, error code %x\n", status);
52 	else
53 		debug("OK\n");
54 
55 	return;
56 }
57 
58 static __maybe_unused void *fsp_prepare_mrc_cache(void)
59 {
60 	struct mrc_data_container *cache;
61 	struct mrc_region entry;
62 	int ret;
63 
64 	ret = mrccache_get_region(NULL, &entry);
65 	if (ret)
66 		return NULL;
67 
68 	cache = mrccache_find_current(&entry);
69 	if (!cache)
70 		return NULL;
71 
72 	debug("%s: mrc cache at %p, size %x checksum %04x\n", __func__,
73 	      cache->data, cache->data_size, cache->checksum);
74 
75 	return cache->data;
76 }
77 
78 int x86_fsp_init(void)
79 {
80 	void *nvs;
81 
82 	if (!gd->arch.hob_list) {
83 #ifdef CONFIG_ENABLE_MRC_CACHE
84 		nvs = fsp_prepare_mrc_cache();
85 #else
86 		nvs = NULL;
87 #endif
88 		/*
89 		 * The first time we enter here, call fsp_init().
90 		 * Note the execution does not return to this function,
91 		 * instead it jumps to fsp_continue().
92 		 */
93 		fsp_init(CONFIG_FSP_TEMP_RAM_ADDR, BOOT_FULL_CONFIG, nvs);
94 	} else {
95 		/*
96 		 * The second time we enter here, adjust the size of malloc()
97 		 * pool before relocation. Given gd->malloc_base was adjusted
98 		 * after the call to board_init_f_mem() in arch/x86/cpu/start.S,
99 		 * we should fix up gd->malloc_limit here.
100 		 */
101 		gd->malloc_limit += CONFIG_FSP_SYS_MALLOC_F_LEN;
102 	}
103 
104 	return 0;
105 }
106