1 /* 2 * From Coreboot file device/oprom/realmode/x86.c 3 * 4 * Copyright (C) 2007 Advanced Micro Devices, Inc. 5 * Copyright (C) 2009-2010 coresystems GmbH 6 * 7 * SPDX-License-Identifier: GPL-2.0 8 */ 9 #include <common.h> 10 #include <bios_emul.h> 11 #include <vbe.h> 12 #include <linux/linkage.h> 13 #include <asm/cache.h> 14 #include <asm/processor.h> 15 #include <asm/i8259.h> 16 #include <asm/io.h> 17 #include <asm/post.h> 18 #include "bios.h" 19 20 /* Interrupt handlers for each interrupt the ROM can call */ 21 static int (*int_handler[256])(void); 22 23 /* to have a common register file for interrupt handlers */ 24 X86EMU_sysEnv _X86EMU_env; 25 26 asmlinkage void (*realmode_call)(u32 addr, u32 eax, u32 ebx, u32 ecx, u32 edx, 27 u32 esi, u32 edi); 28 29 asmlinkage void (*realmode_interrupt)(u32 intno, u32 eax, u32 ebx, u32 ecx, 30 u32 edx, u32 esi, u32 edi); 31 32 static void setup_realmode_code(void) 33 { 34 memcpy((void *)REALMODE_BASE, &asm_realmode_code, 35 asm_realmode_code_size); 36 37 /* Ensure the global pointers are relocated properly. */ 38 realmode_call = PTR_TO_REAL_MODE(asm_realmode_call); 39 realmode_interrupt = PTR_TO_REAL_MODE(__realmode_interrupt); 40 41 debug("Real mode stub @%x: %d bytes\n", REALMODE_BASE, 42 asm_realmode_code_size); 43 } 44 45 static void setup_rombios(void) 46 { 47 const char date[] = "06/11/99"; 48 memcpy((void *)0xffff5, &date, 8); 49 50 const char ident[] = "PCI_ISA"; 51 memcpy((void *)0xfffd9, &ident, 7); 52 53 /* system model: IBM-AT */ 54 writeb(0xfc, 0xffffe); 55 } 56 57 static int int_exception_handler(void) 58 { 59 /* compatibility shim */ 60 struct eregs reg_info = { 61 .eax = M.x86.R_EAX, 62 .ecx = M.x86.R_ECX, 63 .edx = M.x86.R_EDX, 64 .ebx = M.x86.R_EBX, 65 .esp = M.x86.R_ESP, 66 .ebp = M.x86.R_EBP, 67 .esi = M.x86.R_ESI, 68 .edi = M.x86.R_EDI, 69 .vector = M.x86.intno, 70 .error_code = 0, 71 .eip = M.x86.R_EIP, 72 .cs = M.x86.R_CS, 73 .eflags = M.x86.R_EFLG 74 }; 75 struct eregs *regs = ®_info; 76 77 debug("Oops, exception %d while executing option rom\n", regs->vector); 78 cpu_hlt(); 79 80 return 0; 81 } 82 83 static int int_unknown_handler(void) 84 { 85 debug("Unsupported software interrupt #0x%x eax 0x%x\n", 86 M.x86.intno, M.x86.R_EAX); 87 88 return -1; 89 } 90 91 /* setup interrupt handlers for mainboard */ 92 void bios_set_interrupt_handler(int intnum, int (*int_func)(void)) 93 { 94 int_handler[intnum] = int_func; 95 } 96 97 static void setup_interrupt_handlers(void) 98 { 99 int i; 100 101 /* 102 * The first 16 int_handler functions are not BIOS services, 103 * but the CPU-generated exceptions ("hardware interrupts") 104 */ 105 for (i = 0; i < 0x10; i++) 106 int_handler[i] = &int_exception_handler; 107 108 /* Mark all other int_handler calls as unknown first */ 109 for (i = 0x10; i < 0x100; i++) { 110 /* Skip if bios_set_interrupt_handler() isn't called first */ 111 if (int_handler[i]) 112 continue; 113 114 /* 115 * Now set the default functions that are actually needed 116 * to initialize the option roms. The board may override 117 * these with bios_set_interrupt_handler() 118 */ 119 switch (i) { 120 case 0x10: 121 int_handler[0x10] = &int10_handler; 122 break; 123 case 0x12: 124 int_handler[0x12] = &int12_handler; 125 break; 126 case 0x16: 127 int_handler[0x16] = &int16_handler; 128 break; 129 case 0x1a: 130 int_handler[0x1a] = &int1a_handler; 131 break; 132 default: 133 int_handler[i] = &int_unknown_handler; 134 break; 135 } 136 } 137 } 138 139 static void write_idt_stub(void *target, u8 intnum) 140 { 141 unsigned char *codeptr; 142 143 codeptr = (unsigned char *)target; 144 memcpy(codeptr, &__idt_handler, __idt_handler_size); 145 codeptr[3] = intnum; /* modify int# in the code stub. */ 146 } 147 148 static void setup_realmode_idt(void) 149 { 150 struct realmode_idt *idts = NULL; 151 int i; 152 153 /* 154 * Copy IDT stub code for each interrupt. This might seem wasteful 155 * but it is really simple 156 */ 157 for (i = 0; i < 256; i++) { 158 idts[i].cs = 0; 159 idts[i].offset = 0x1000 + (i * __idt_handler_size); 160 write_idt_stub((void *)((u32)idts[i].offset), i); 161 } 162 163 /* 164 * Many option ROMs use the hard coded interrupt entry points in the 165 * system bios. So install them at the known locations. 166 */ 167 168 /* int42 is the relocated int10 */ 169 write_idt_stub((void *)0xff065, 0x42); 170 /* BIOS Int 11 Handler F000:F84D */ 171 write_idt_stub((void *)0xff84d, 0x11); 172 /* BIOS Int 12 Handler F000:F841 */ 173 write_idt_stub((void *)0xff841, 0x12); 174 /* BIOS Int 13 Handler F000:EC59 */ 175 write_idt_stub((void *)0xfec59, 0x13); 176 /* BIOS Int 14 Handler F000:E739 */ 177 write_idt_stub((void *)0xfe739, 0x14); 178 /* BIOS Int 15 Handler F000:F859 */ 179 write_idt_stub((void *)0xff859, 0x15); 180 /* BIOS Int 16 Handler F000:E82E */ 181 write_idt_stub((void *)0xfe82e, 0x16); 182 /* BIOS Int 17 Handler F000:EFD2 */ 183 write_idt_stub((void *)0xfefd2, 0x17); 184 /* ROM BIOS Int 1A Handler F000:FE6E */ 185 write_idt_stub((void *)0xffe6e, 0x1a); 186 } 187 188 static u8 vbe_get_mode_info(struct vbe_mode_info *mi) 189 { 190 u16 buffer_seg; 191 u16 buffer_adr; 192 char *buffer; 193 194 debug("VBE: Getting information about VESA mode %04x\n", 195 mi->video_mode); 196 buffer = PTR_TO_REAL_MODE(asm_realmode_buffer); 197 buffer_seg = (((unsigned long)buffer) >> 4) & 0xff00; 198 buffer_adr = ((unsigned long)buffer) & 0xffff; 199 200 realmode_interrupt(0x10, VESA_GET_MODE_INFO, 0x0000, mi->video_mode, 201 0x0000, buffer_seg, buffer_adr); 202 memcpy(mi->mode_info_block, buffer, sizeof(struct vbe_mode_info)); 203 mi->valid = true; 204 205 return 0; 206 } 207 208 static u8 vbe_set_mode(struct vbe_mode_info *mi) 209 { 210 int video_mode = mi->video_mode; 211 212 debug("VBE: Setting VESA mode %#04x\n", video_mode); 213 /* request linear framebuffer mode */ 214 video_mode |= (1 << 14); 215 /* don't clear the framebuffer, we do that later */ 216 video_mode |= (1 << 15); 217 realmode_interrupt(0x10, VESA_SET_MODE, video_mode, 218 0x0000, 0x0000, 0x0000, 0x0000); 219 220 return 0; 221 } 222 223 static void vbe_set_graphics(int vesa_mode, struct vbe_mode_info *mode_info) 224 { 225 unsigned char *framebuffer; 226 227 mode_info->video_mode = (1 << 14) | vesa_mode; 228 vbe_get_mode_info(mode_info); 229 230 framebuffer = (unsigned char *)mode_info->vesa.phys_base_ptr; 231 debug("VBE: resolution: %dx%d@%d\n", 232 le16_to_cpu(mode_info->vesa.x_resolution), 233 le16_to_cpu(mode_info->vesa.y_resolution), 234 mode_info->vesa.bits_per_pixel); 235 debug("VBE: framebuffer: %p\n", framebuffer); 236 if (!framebuffer) { 237 debug("VBE: Mode does not support linear framebuffer\n"); 238 return; 239 } 240 241 mode_info->video_mode &= 0x3ff; 242 vbe_set_mode(mode_info); 243 } 244 245 void bios_run_on_x86(pci_dev_t pcidev, unsigned long addr, int vesa_mode, 246 struct vbe_mode_info *mode_info) 247 { 248 u32 num_dev; 249 250 num_dev = PCI_BUS(pcidev) << 8 | PCI_DEV(pcidev) << 3 | 251 PCI_FUNC(pcidev); 252 253 /* Needed to avoid exceptions in some ROMs */ 254 interrupt_init(); 255 256 /* Set up some legacy information in the F segment */ 257 setup_rombios(); 258 259 /* Set up C interrupt handlers */ 260 setup_interrupt_handlers(); 261 262 /* Set up real-mode IDT */ 263 setup_realmode_idt(); 264 265 /* Make sure the code is placed. */ 266 setup_realmode_code(); 267 268 debug("Calling Option ROM at %lx, pci device %#x...", addr, num_dev); 269 270 /* Option ROM entry point is at OPROM start + 3 */ 271 realmode_call(addr + 0x0003, num_dev, 0xffff, 0x0000, 0xffff, 0x0, 272 0x0); 273 debug("done\n"); 274 275 if (vesa_mode != -1) 276 vbe_set_graphics(vesa_mode, mode_info); 277 } 278 279 asmlinkage int interrupt_handler(u32 intnumber, u32 gsfs, u32 dses, 280 u32 edi, u32 esi, u32 ebp, u32 esp, 281 u32 ebx, u32 edx, u32 ecx, u32 eax, 282 u32 cs_ip, u16 stackflags) 283 { 284 u32 ip; 285 u32 cs; 286 u32 flags; 287 int ret = 0; 288 289 ip = cs_ip & 0xffff; 290 cs = cs_ip >> 16; 291 flags = stackflags; 292 293 #ifdef CONFIG_REALMODE_DEBUG 294 debug("oprom: INT# 0x%x\n", intnumber); 295 debug("oprom: eax: %08x ebx: %08x ecx: %08x edx: %08x\n", 296 eax, ebx, ecx, edx); 297 debug("oprom: ebp: %08x esp: %08x edi: %08x esi: %08x\n", 298 ebp, esp, edi, esi); 299 debug("oprom: ip: %04x cs: %04x flags: %08x\n", 300 ip, cs, flags); 301 debug("oprom: stackflags = %04x\n", stackflags); 302 #endif 303 304 /* 305 * Fetch arguments from the stack and put them to a place 306 * suitable for the interrupt handlers 307 */ 308 M.x86.R_EAX = eax; 309 M.x86.R_ECX = ecx; 310 M.x86.R_EDX = edx; 311 M.x86.R_EBX = ebx; 312 M.x86.R_ESP = esp; 313 M.x86.R_EBP = ebp; 314 M.x86.R_ESI = esi; 315 M.x86.R_EDI = edi; 316 M.x86.intno = intnumber; 317 M.x86.R_EIP = ip; 318 M.x86.R_CS = cs; 319 M.x86.R_EFLG = flags; 320 321 /* Call the interrupt handler for this interrupt number */ 322 ret = int_handler[intnumber](); 323 324 /* 325 * This code is quite strange... 326 * 327 * Put registers back on the stack. The assembler code will pop them 328 * later. We force (volatile!) changing the values of the parameters 329 * of this function. We know that they stay alive on the stack after 330 * we leave this function. 331 */ 332 *(volatile u32 *)&eax = M.x86.R_EAX; 333 *(volatile u32 *)&ecx = M.x86.R_ECX; 334 *(volatile u32 *)&edx = M.x86.R_EDX; 335 *(volatile u32 *)&ebx = M.x86.R_EBX; 336 *(volatile u32 *)&esi = M.x86.R_ESI; 337 *(volatile u32 *)&edi = M.x86.R_EDI; 338 flags = M.x86.R_EFLG; 339 340 /* Pass success or error back to our caller via the CARRY flag */ 341 if (ret) { 342 flags &= ~1; /* no error: clear carry */ 343 } else { 344 debug("int%02x call returned error\n", intnumber); 345 flags |= 1; /* error: set carry */ 346 } 347 *(volatile u16 *)&stackflags = flags; 348 349 return ret; 350 } 351