xref: /openbmc/u-boot/arch/x86/include/asm/tables.h (revision 699c4e59)
1 /*
2  * Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com>
3  *
4  * SPDX-License-Identifier:	GPL-2.0+
5  */
6 
7 #ifndef _X86_TABLES_H_
8 #define _X86_TABLES_H_
9 
10 /*
11  * All x86 tables happen to like the address range from 0xf0000 to 0x100000.
12  * We use 0xf0000 as the starting address to store those tables, including
13  * PIRQ routing table, Multi-Processor table and ACPI table.
14  */
15 #define ROM_TABLE_ADDR	0xf0000
16 
17 #define ROM_TABLE_ALIGN	1024
18 
19 /* SeaBIOS expects coreboot tables at address range 0x0000-0x1000 */
20 #define CB_TABLE_ADDR	0x800
21 
22 /**
23  * table_compute_checksum() - Compute a table checksum
24  *
25  * This computes an 8-bit checksum for the configuration table.
26  * All bytes in the configuration table, including checksum itself and
27  * reserved bytes must add up to zero.
28  *
29  * @v:		configuration table base address
30  * @len:	configuration table size
31  * @return:	the 8-bit checksum
32  */
33 u8 table_compute_checksum(void *v, int len);
34 
35 /**
36  * table_fill_string() - Fill a string with pad in the configuration table
37  *
38  * This fills a string in the configuration table. It copies number of bytes
39  * from the source string, and if source string length is shorter than the
40  * required size to copy, pad the table string with the given pad character.
41  *
42  * @dest:	where to fill a string
43  * @src:	where to copy from
44  * @n:		number of bytes to copy
45  * @pad:	character to pad the remaining bytes
46  */
47 void table_fill_string(char *dest, const char *src, size_t n, char pad);
48 
49 /**
50  * write_tables() - Write x86 configuration tables
51  *
52  * This writes x86 configuration tables, including PIRQ routing table,
53  * Multi-Processor table and ACPI table. Whether a specific type of
54  * configuration table is written is controlled by a Kconfig option.
55  */
56 void write_tables(void);
57 
58 /**
59  * write_pirq_routing_table() - Write PIRQ routing table
60  *
61  * This writes PIRQ routing table at a given address.
62  *
63  * @start:	start address to write PIRQ routing table
64  * @return:	end address of PIRQ routing table
65  */
66 u32 write_pirq_routing_table(u32 start);
67 
68 #endif /* _X86_TABLES_H_ */
69