1*bb416465SFelipe Balbi /* 2*bb416465SFelipe Balbi * Copyright (c) 2017 Intel Corporation 3*bb416465SFelipe Balbi * 4*bb416465SFelipe Balbi * SPDX-License-Identifier: GPL-2.0+ 5*bb416465SFelipe Balbi */ 6*bb416465SFelipe Balbi #ifndef _X86_ASM_SCU_IPC_H_ 7*bb416465SFelipe Balbi #define _X86_ASM_SCU_IPC_H_ 8*bb416465SFelipe Balbi 9*bb416465SFelipe Balbi /* IPC defines the following message types */ 10*bb416465SFelipe Balbi #define IPCMSG_WARM_RESET 0xf0 11*bb416465SFelipe Balbi #define IPCMSG_COLD_RESET 0xf1 12*bb416465SFelipe Balbi #define IPCMSG_SOFT_RESET 0xf2 13*bb416465SFelipe Balbi #define IPCMSG_COLD_BOOT 0xf3 14*bb416465SFelipe Balbi #define IPCMSG_GET_FW_REVISION 0xf4 15*bb416465SFelipe Balbi #define IPCMSG_WATCHDOG_TIMER 0xf8 /* Set Kernel Watchdog Threshold */ 16*bb416465SFelipe Balbi 17*bb416465SFelipe Balbi struct ipc_ifwi_version { 18*bb416465SFelipe Balbi u16 minor; 19*bb416465SFelipe Balbi u8 major; 20*bb416465SFelipe Balbi u8 hardware_id; 21*bb416465SFelipe Balbi u32 reserved[3]; 22*bb416465SFelipe Balbi }; 23*bb416465SFelipe Balbi 24*bb416465SFelipe Balbi /* Issue commands to the SCU with or without data */ 25*bb416465SFelipe Balbi int scu_ipc_simple_command(u32 cmd, u32 sub); 26*bb416465SFelipe Balbi int scu_ipc_command(u32 cmd, u32 sub, u32 *in, int inlen, u32 *out, int outlen); 27*bb416465SFelipe Balbi 28*bb416465SFelipe Balbi #endif /* _X86_ASM_SCU_IPC_H_ */ 29