xref: /openbmc/u-boot/arch/x86/include/asm/pnp_def.h (revision 8e18f34c)
1 /*
2  * Copyright (C) 2014, Bin Meng <bmeng.cn@gmail.com>
3  *
4  * Adapted from coreboot src/include/device/pnp_def.h
5  * and arch/x86/include/arch/io.h
6  *
7  * SPDX-License-Identifier:	GPL-2.0+
8  */
9 
10 #ifndef _ASM_PNP_DEF_H_
11 #define _ASM_PNP_DEF_H_
12 
13 #include <asm/io.h>
14 
15 #define PNP_IDX_EN   0x30
16 #define PNP_IDX_IO0  0x60
17 #define PNP_IDX_IO1  0x62
18 #define PNP_IDX_IO2  0x64
19 #define PNP_IDX_IO3  0x66
20 #define PNP_IDX_IRQ0 0x70
21 #define PNP_IDX_IRQ1 0x72
22 #define PNP_IDX_DRQ0 0x74
23 #define PNP_IDX_DRQ1 0x75
24 #define PNP_IDX_MSC0 0xf0
25 #define PNP_IDX_MSC1 0xf1
26 
27 /* Generic functions for pnp devices */
28 
29 /*
30  * pnp device is a 16-bit integer composed of its i/o port address at high byte
31  * and logic function number at low byte.
32  */
33 #define PNP_DEV(PORT, FUNC) (((PORT) << 8) | (FUNC))
34 
35 static inline void pnp_write_config(uint16_t dev, uint8_t reg, uint8_t value)
36 {
37 	uint8_t port = dev >> 8;
38 
39 	outb(reg, port);
40 	outb(value, port + 1);
41 }
42 
43 static inline uint8_t pnp_read_config(uint16_t dev, uint8_t reg)
44 {
45 	uint8_t port = dev >> 8;
46 
47 	outb(reg, port);
48 	return inb(port + 1);
49 }
50 
51 static inline void pnp_set_logical_device(uint16_t dev)
52 {
53 	uint8_t device = dev & 0xff;
54 
55 	pnp_write_config(dev, 0x07, device);
56 }
57 
58 static inline void pnp_set_enable(uint16_t dev, int enable)
59 {
60 	pnp_write_config(dev, PNP_IDX_EN, enable ? 1 : 0);
61 }
62 
63 static inline int pnp_read_enable(uint16_t dev)
64 {
65 	return !!pnp_read_config(dev, PNP_IDX_EN);
66 }
67 
68 static inline void pnp_set_iobase(uint16_t dev, uint8_t index, uint16_t iobase)
69 {
70 	pnp_write_config(dev, index + 0, (iobase >> 8) & 0xff);
71 	pnp_write_config(dev, index + 1, iobase & 0xff);
72 }
73 
74 static inline uint16_t pnp_read_iobase(uint16_t dev, uint8_t index)
75 {
76 	return ((uint16_t)(pnp_read_config(dev, index)) << 8) |
77 		pnp_read_config(dev, index + 1);
78 }
79 
80 static inline void pnp_set_irq(uint16_t dev, uint8_t index, unsigned irq)
81 {
82 	pnp_write_config(dev, index, irq);
83 }
84 
85 static inline void pnp_set_drq(uint16_t dev, uint8_t index, unsigned drq)
86 {
87 	pnp_write_config(dev, index, drq & 0xff);
88 }
89 
90 #endif /* _ASM_PNP_DEF_H_ */
91