xref: /openbmc/u-boot/arch/x86/include/asm/pci.h (revision 93322749)
1 
2 /*
3  * (C) Copyright 2002
4  * Daniel Engström, Omicron Ceti AB, daniel@omicron.se
5  *
6  * SPDX-License-Identifier:	GPL-2.0+
7  */
8 
9 #ifndef _PCI_I386_H_
10 #define _PCI_I386_H_
11 
12 #define DEFINE_PCI_DEVICE_TABLE(_table) \
13 	const struct pci_device_id _table[]
14 
15 struct pci_controller;
16 
17 void pci_setup_type1(struct pci_controller *hose);
18 
19 /**
20  * board_pci_setup_hose() - Set up the PCI hose
21  *
22  * This is called by the common x86 PCI code to set up the PCI controller
23  * hose. It may be called when no memory/BSS is available so should just
24  * store things in 'hose' and not in BSS variables.
25  */
26 void board_pci_setup_hose(struct pci_controller *hose);
27 
28 /**
29  * pci_early_init_hose() - Set up PCI host before relocation
30  *
31  * This allocates memory for, sets up and returns the PCI hose. It can be
32  * called before relocation. The hose will be stored in gd->arch.hose for
33  * later use, but will become invalid one DRAM is available.
34  */
35 int pci_early_init_hose(struct pci_controller **hosep);
36 
37 int board_pci_pre_scan(struct pci_controller *hose);
38 int board_pci_post_scan(struct pci_controller *hose);
39 
40 /*
41  * Simple PCI access routines - these work from either the early PCI hose
42  * or the 'real' one, created after U-Boot has memory available
43  */
44 unsigned int pci_read_config8(pci_dev_t dev, unsigned where);
45 unsigned int pci_read_config16(pci_dev_t dev, unsigned where);
46 unsigned int pci_read_config32(pci_dev_t dev, unsigned where);
47 
48 void pci_write_config8(pci_dev_t dev, unsigned where, unsigned value);
49 void pci_write_config16(pci_dev_t dev, unsigned where, unsigned value);
50 void pci_write_config32(pci_dev_t dev, unsigned where, unsigned value);
51 
52 #endif
53