1 /* 2 * (C) Copyright 2002 3 * Daniel Engström, Omicron Ceti AB, daniel@omicron.se 4 * 5 * SPDX-License-Identifier: GPL-2.0+ 6 */ 7 8 #ifndef _PCI_I386_H_ 9 #define _PCI_I386_H_ 10 11 #include <pci.h> 12 13 /* bus mapping constants (used for PCI core initialization) */ 14 #define PCI_REG_ADDR 0xcf8 15 #define PCI_REG_DATA 0xcfc 16 17 #define PCI_CFG_EN 0x80000000 18 19 #ifndef __ASSEMBLY__ 20 21 #define DEFINE_PCI_DEVICE_TABLE(_table) \ 22 const struct pci_device_id _table[] 23 24 struct pci_controller; 25 26 void pci_setup_type1(struct pci_controller *hose); 27 28 /* 29 * Simple PCI access routines - these work from either the early PCI hose 30 * or the 'real' one, created after U-Boot has memory available 31 */ 32 unsigned int x86_pci_read_config8(pci_dev_t dev, unsigned where); 33 unsigned int x86_pci_read_config16(pci_dev_t dev, unsigned where); 34 unsigned int x86_pci_read_config32(pci_dev_t dev, unsigned where); 35 36 void x86_pci_write_config8(pci_dev_t dev, unsigned where, unsigned value); 37 void x86_pci_write_config16(pci_dev_t dev, unsigned where, unsigned value); 38 void x86_pci_write_config32(pci_dev_t dev, unsigned where, unsigned value); 39 40 int pci_x86_read_config(struct udevice *bus, pci_dev_t bdf, uint offset, 41 ulong *valuep, enum pci_size_t size); 42 43 int pci_x86_write_config(struct udevice *bus, pci_dev_t bdf, uint offset, 44 ulong value, enum pci_size_t size); 45 46 /** 47 * Assign IRQ number to a PCI device 48 * 49 * This function assigns IRQ for a PCI device. If the device does not exist 50 * or does not require interrupts then this function has no effect. 51 * 52 * @bus: PCI bus number 53 * @device: PCI device number 54 * @irq: An array of IRQ numbers that are assigned to INTA through 55 * INTD of this PCI device. 56 */ 57 void pci_assign_irqs(int bus, int device, u8 irq[4]); 58 59 #endif /* __ASSEMBLY__ */ 60 61 #endif /* _PCI_I386_H_ */ 62