198568f0fSGraeme Russ /* 298568f0fSGraeme Russ * Taken from the linux kernel file of the same name 398568f0fSGraeme Russ * 498568f0fSGraeme Russ * (C) Copyright 2012 598568f0fSGraeme Russ * Graeme Russ, <graeme.russ@gmail.com> 698568f0fSGraeme Russ * 71a459660SWolfgang Denk * SPDX-License-Identifier: GPL-2.0+ 898568f0fSGraeme Russ */ 998568f0fSGraeme Russ 1098568f0fSGraeme Russ #ifndef _ASM_X86_MSR_H 1198568f0fSGraeme Russ #define _ASM_X86_MSR_H 1298568f0fSGraeme Russ 1398568f0fSGraeme Russ #include <asm/msr-index.h> 1498568f0fSGraeme Russ 1598568f0fSGraeme Russ #ifndef __ASSEMBLY__ 1698568f0fSGraeme Russ 1798568f0fSGraeme Russ #include <linux/types.h> 1898568f0fSGraeme Russ #include <linux/ioctl.h> 1998568f0fSGraeme Russ 2098568f0fSGraeme Russ #define X86_IOC_RDMSR_REGS _IOWR('c', 0xA0, __u32[8]) 2198568f0fSGraeme Russ #define X86_IOC_WRMSR_REGS _IOWR('c', 0xA1, __u32[8]) 2298568f0fSGraeme Russ 2398568f0fSGraeme Russ #ifdef __KERNEL__ 2498568f0fSGraeme Russ 2598568f0fSGraeme Russ #include <asm/errno.h> 2698568f0fSGraeme Russ 2798568f0fSGraeme Russ struct msr { 2898568f0fSGraeme Russ union { 2998568f0fSGraeme Russ struct { 3098568f0fSGraeme Russ u32 l; 3198568f0fSGraeme Russ u32 h; 3298568f0fSGraeme Russ }; 3398568f0fSGraeme Russ u64 q; 3498568f0fSGraeme Russ }; 3598568f0fSGraeme Russ }; 3698568f0fSGraeme Russ 3798568f0fSGraeme Russ struct msr_info { 3898568f0fSGraeme Russ u32 msr_no; 3998568f0fSGraeme Russ struct msr reg; 4098568f0fSGraeme Russ struct msr *msrs; 4198568f0fSGraeme Russ int err; 4298568f0fSGraeme Russ }; 4398568f0fSGraeme Russ 4498568f0fSGraeme Russ struct msr_regs_info { 4598568f0fSGraeme Russ u32 *regs; 4698568f0fSGraeme Russ int err; 4798568f0fSGraeme Russ }; 4898568f0fSGraeme Russ 4998568f0fSGraeme Russ static inline unsigned long long native_read_tscp(unsigned int *aux) 5098568f0fSGraeme Russ { 5198568f0fSGraeme Russ unsigned long low, high; 5298568f0fSGraeme Russ asm volatile(".byte 0x0f,0x01,0xf9" 5398568f0fSGraeme Russ : "=a" (low), "=d" (high), "=c" (*aux)); 5498568f0fSGraeme Russ return low | ((u64)high << 32); 5598568f0fSGraeme Russ } 5698568f0fSGraeme Russ 5798568f0fSGraeme Russ /* 5898568f0fSGraeme Russ * both i386 and x86_64 returns 64-bit value in edx:eax, but gcc's "A" 5998568f0fSGraeme Russ * constraint has different meanings. For i386, "A" means exactly 6098568f0fSGraeme Russ * edx:eax, while for x86_64 it doesn't mean rdx:rax or edx:eax. Instead, 6198568f0fSGraeme Russ * it means rax *or* rdx. 6298568f0fSGraeme Russ */ 6398568f0fSGraeme Russ #ifdef CONFIG_X86_64 6498568f0fSGraeme Russ #define DECLARE_ARGS(val, low, high) unsigned low, high 6598568f0fSGraeme Russ #define EAX_EDX_VAL(val, low, high) ((low) | ((u64)(high) << 32)) 6698568f0fSGraeme Russ #define EAX_EDX_ARGS(val, low, high) "a" (low), "d" (high) 6798568f0fSGraeme Russ #define EAX_EDX_RET(val, low, high) "=a" (low), "=d" (high) 6898568f0fSGraeme Russ #else 6998568f0fSGraeme Russ #define DECLARE_ARGS(val, low, high) unsigned long long val 7098568f0fSGraeme Russ #define EAX_EDX_VAL(val, low, high) (val) 7198568f0fSGraeme Russ #define EAX_EDX_ARGS(val, low, high) "A" (val) 7298568f0fSGraeme Russ #define EAX_EDX_RET(val, low, high) "=A" (val) 7398568f0fSGraeme Russ #endif 7498568f0fSGraeme Russ 75d8819f94SSimon Glass static inline __attribute__((no_instrument_function)) 76d8819f94SSimon Glass unsigned long long native_read_msr(unsigned int msr) 7798568f0fSGraeme Russ { 7898568f0fSGraeme Russ DECLARE_ARGS(val, low, high); 7998568f0fSGraeme Russ 8098568f0fSGraeme Russ asm volatile("rdmsr" : EAX_EDX_RET(val, low, high) : "c" (msr)); 8198568f0fSGraeme Russ return EAX_EDX_VAL(val, low, high); 8298568f0fSGraeme Russ } 8398568f0fSGraeme Russ 8498568f0fSGraeme Russ static inline void native_write_msr(unsigned int msr, 8598568f0fSGraeme Russ unsigned low, unsigned high) 8698568f0fSGraeme Russ { 8798568f0fSGraeme Russ asm volatile("wrmsr" : : "c" (msr), "a"(low), "d" (high) : "memory"); 8898568f0fSGraeme Russ } 8998568f0fSGraeme Russ 9098568f0fSGraeme Russ extern unsigned long long native_read_tsc(void); 9198568f0fSGraeme Russ 9298568f0fSGraeme Russ extern int native_rdmsr_safe_regs(u32 regs[8]); 9398568f0fSGraeme Russ extern int native_wrmsr_safe_regs(u32 regs[8]); 9498568f0fSGraeme Russ 9598568f0fSGraeme Russ static inline unsigned long long native_read_pmc(int counter) 9698568f0fSGraeme Russ { 9798568f0fSGraeme Russ DECLARE_ARGS(val, low, high); 9898568f0fSGraeme Russ 9998568f0fSGraeme Russ asm volatile("rdpmc" : EAX_EDX_RET(val, low, high) : "c" (counter)); 10098568f0fSGraeme Russ return EAX_EDX_VAL(val, low, high); 10198568f0fSGraeme Russ } 10298568f0fSGraeme Russ 10398568f0fSGraeme Russ #ifdef CONFIG_PARAVIRT 10498568f0fSGraeme Russ #include <asm/paravirt.h> 10598568f0fSGraeme Russ #else 10698568f0fSGraeme Russ #include <errno.h> 10798568f0fSGraeme Russ /* 10898568f0fSGraeme Russ * Access to machine-specific registers (available on 586 and better only) 10998568f0fSGraeme Russ * Note: the rd* operations modify the parameters directly (without using 11098568f0fSGraeme Russ * pointer indirection), this allows gcc to optimize better 11198568f0fSGraeme Russ */ 11298568f0fSGraeme Russ 11398568f0fSGraeme Russ #define rdmsr(msr, val1, val2) \ 11498568f0fSGraeme Russ do { \ 11598568f0fSGraeme Russ u64 __val = native_read_msr((msr)); \ 11698568f0fSGraeme Russ (void)((val1) = (u32)__val); \ 11798568f0fSGraeme Russ (void)((val2) = (u32)(__val >> 32)); \ 11898568f0fSGraeme Russ } while (0) 11998568f0fSGraeme Russ 12098568f0fSGraeme Russ static inline void wrmsr(unsigned msr, unsigned low, unsigned high) 12198568f0fSGraeme Russ { 12298568f0fSGraeme Russ native_write_msr(msr, low, high); 12398568f0fSGraeme Russ } 12498568f0fSGraeme Russ 12598568f0fSGraeme Russ #define rdmsrl(msr, val) \ 12698568f0fSGraeme Russ ((val) = native_read_msr((msr))) 12798568f0fSGraeme Russ 12898568f0fSGraeme Russ #define wrmsrl(msr, val) \ 12998568f0fSGraeme Russ native_write_msr((msr), (u32)((u64)(val)), (u32)((u64)(val) >> 32)) 13098568f0fSGraeme Russ 131*86196c65SSimon Glass static inline void msr_clrsetbits_64(unsigned msr, u64 clear, u64 set) 132*86196c65SSimon Glass { 133*86196c65SSimon Glass u64 val; 134*86196c65SSimon Glass 135*86196c65SSimon Glass val = native_read_msr(msr); 136*86196c65SSimon Glass val &= ~clear; 137*86196c65SSimon Glass val |= set; 138*86196c65SSimon Glass wrmsrl(msr, val); 139*86196c65SSimon Glass } 140*86196c65SSimon Glass 141*86196c65SSimon Glass static inline void msr_setbits_64(unsigned msr, u64 set) 142*86196c65SSimon Glass { 143*86196c65SSimon Glass u64 val; 144*86196c65SSimon Glass 145*86196c65SSimon Glass val = native_read_msr(msr); 146*86196c65SSimon Glass val |= set; 147*86196c65SSimon Glass wrmsrl(msr, val); 148*86196c65SSimon Glass } 149*86196c65SSimon Glass 150*86196c65SSimon Glass static inline void msr_clrbits_64(unsigned msr, u64 clear) 151*86196c65SSimon Glass { 152*86196c65SSimon Glass u64 val; 153*86196c65SSimon Glass 154*86196c65SSimon Glass val = native_read_msr(msr); 155*86196c65SSimon Glass val &= ~clear; 156*86196c65SSimon Glass wrmsrl(msr, val); 157*86196c65SSimon Glass } 158*86196c65SSimon Glass 15998568f0fSGraeme Russ /* rdmsr with exception handling */ 16098568f0fSGraeme Russ #define rdmsr_safe(msr, p1, p2) \ 16198568f0fSGraeme Russ ({ \ 16298568f0fSGraeme Russ int __err; \ 16398568f0fSGraeme Russ u64 __val = native_read_msr_safe((msr), &__err); \ 16498568f0fSGraeme Russ (*p1) = (u32)__val; \ 16598568f0fSGraeme Russ (*p2) = (u32)(__val >> 32); \ 16698568f0fSGraeme Russ __err; \ 16798568f0fSGraeme Russ }) 16898568f0fSGraeme Russ 16998568f0fSGraeme Russ static inline int rdmsrl_amd_safe(unsigned msr, unsigned long long *p) 17098568f0fSGraeme Russ { 17198568f0fSGraeme Russ u32 gprs[8] = { 0 }; 17298568f0fSGraeme Russ int err; 17398568f0fSGraeme Russ 17498568f0fSGraeme Russ gprs[1] = msr; 17598568f0fSGraeme Russ gprs[7] = 0x9c5a203a; 17698568f0fSGraeme Russ 17798568f0fSGraeme Russ err = native_rdmsr_safe_regs(gprs); 17898568f0fSGraeme Russ 17998568f0fSGraeme Russ *p = gprs[0] | ((u64)gprs[2] << 32); 18098568f0fSGraeme Russ 18198568f0fSGraeme Russ return err; 18298568f0fSGraeme Russ } 18398568f0fSGraeme Russ 18498568f0fSGraeme Russ static inline int wrmsrl_amd_safe(unsigned msr, unsigned long long val) 18598568f0fSGraeme Russ { 18698568f0fSGraeme Russ u32 gprs[8] = { 0 }; 18798568f0fSGraeme Russ 18898568f0fSGraeme Russ gprs[0] = (u32)val; 18998568f0fSGraeme Russ gprs[1] = msr; 19098568f0fSGraeme Russ gprs[2] = val >> 32; 19198568f0fSGraeme Russ gprs[7] = 0x9c5a203a; 19298568f0fSGraeme Russ 19398568f0fSGraeme Russ return native_wrmsr_safe_regs(gprs); 19498568f0fSGraeme Russ } 19598568f0fSGraeme Russ 19698568f0fSGraeme Russ static inline int rdmsr_safe_regs(u32 regs[8]) 19798568f0fSGraeme Russ { 19898568f0fSGraeme Russ return native_rdmsr_safe_regs(regs); 19998568f0fSGraeme Russ } 20098568f0fSGraeme Russ 20198568f0fSGraeme Russ static inline int wrmsr_safe_regs(u32 regs[8]) 20298568f0fSGraeme Russ { 20398568f0fSGraeme Russ return native_wrmsr_safe_regs(regs); 20498568f0fSGraeme Russ } 20598568f0fSGraeme Russ 206eddbad22SSimon Glass typedef struct msr_t { 207eddbad22SSimon Glass uint32_t lo; 208eddbad22SSimon Glass uint32_t hi; 209eddbad22SSimon Glass } msr_t; 210eddbad22SSimon Glass 211eddbad22SSimon Glass static inline struct msr_t msr_read(unsigned msr_num) 212eddbad22SSimon Glass { 213eddbad22SSimon Glass struct msr_t msr; 214eddbad22SSimon Glass 215eddbad22SSimon Glass rdmsr(msr_num, msr.lo, msr.hi); 216eddbad22SSimon Glass 217eddbad22SSimon Glass return msr; 218eddbad22SSimon Glass } 219eddbad22SSimon Glass 220eddbad22SSimon Glass static inline void msr_write(unsigned msr_num, msr_t msr) 221eddbad22SSimon Glass { 222eddbad22SSimon Glass wrmsr(msr_num, msr.lo, msr.hi); 223eddbad22SSimon Glass } 224eddbad22SSimon Glass 22598568f0fSGraeme Russ #define rdtscl(low) \ 22698568f0fSGraeme Russ ((low) = (u32)__native_read_tsc()) 22798568f0fSGraeme Russ 22898568f0fSGraeme Russ #define rdtscll(val) \ 22998568f0fSGraeme Russ ((val) = __native_read_tsc()) 23098568f0fSGraeme Russ 23198568f0fSGraeme Russ #define rdpmc(counter, low, high) \ 23298568f0fSGraeme Russ do { \ 23398568f0fSGraeme Russ u64 _l = native_read_pmc((counter)); \ 23498568f0fSGraeme Russ (low) = (u32)_l; \ 23598568f0fSGraeme Russ (high) = (u32)(_l >> 32); \ 23698568f0fSGraeme Russ } while (0) 23798568f0fSGraeme Russ 23898568f0fSGraeme Russ #define rdtscp(low, high, aux) \ 23998568f0fSGraeme Russ do { \ 24098568f0fSGraeme Russ unsigned long long _val = native_read_tscp(&(aux)); \ 24198568f0fSGraeme Russ (low) = (u32)_val; \ 24298568f0fSGraeme Russ (high) = (u32)(_val >> 32); \ 24398568f0fSGraeme Russ } while (0) 24498568f0fSGraeme Russ 24598568f0fSGraeme Russ #define rdtscpll(val, aux) (val) = native_read_tscp(&(aux)) 24698568f0fSGraeme Russ 24798568f0fSGraeme Russ #endif /* !CONFIG_PARAVIRT */ 24898568f0fSGraeme Russ 24998568f0fSGraeme Russ 25098568f0fSGraeme Russ #define checking_wrmsrl(msr, val) wrmsr_safe((msr), (u32)(val), \ 25198568f0fSGraeme Russ (u32)((val) >> 32)) 25298568f0fSGraeme Russ 25398568f0fSGraeme Russ #define write_tsc(val1, val2) wrmsr(MSR_IA32_TSC, (val1), (val2)) 25498568f0fSGraeme Russ 25598568f0fSGraeme Russ #define write_rdtscp_aux(val) wrmsr(MSR_TSC_AUX, (val), 0) 25698568f0fSGraeme Russ 25798568f0fSGraeme Russ struct msr *msrs_alloc(void); 25898568f0fSGraeme Russ void msrs_free(struct msr *msrs); 25998568f0fSGraeme Russ 26098568f0fSGraeme Russ #endif /* __KERNEL__ */ 26198568f0fSGraeme Russ #endif /* __ASSEMBLY__ */ 26298568f0fSGraeme Russ #endif /* _ASM_X86_MSR_H */ 263