1*83d290c5STom Rini /* SPDX-License-Identifier: GPL-2.0+ */ 2f6220f1aSBin Meng /* 3bfa95c53SBin Meng * Copyright (C) 2014 Google, Inc 4ed800961SBin Meng * Copyright (C) 2015 Bin Meng <bmeng.cn@gmail.com> 5f6220f1aSBin Meng */ 6f6220f1aSBin Meng 7bfa95c53SBin Meng #ifndef _ASM_MRCCACHE_H 8bfa95c53SBin Meng #define _ASM_MRCCACHE_H 9f6220f1aSBin Meng 10f6220f1aSBin Meng #define MRC_DATA_ALIGN 0x1000 11bfa95c53SBin Meng #define MRC_DATA_SIGNATURE (('M' << 0) | ('R' << 8) | \ 12bfa95c53SBin Meng ('C' << 16) | ('D'<<24)) 13f6220f1aSBin Meng 14ed800961SBin Meng #define MRC_DATA_HEADER_SIZE 32 15ed800961SBin Meng 16bfa95c53SBin Meng struct __packed mrc_data_container { 17f6220f1aSBin Meng u32 signature; /* "MRCD" */ 18f6220f1aSBin Meng u32 data_size; /* Size of the 'data' field */ 19f6220f1aSBin Meng u32 checksum; /* IP style checksum */ 20f6220f1aSBin Meng u32 reserved; /* For header alignment */ 21f6220f1aSBin Meng u8 data[0]; /* Variable size, platform/run time dependent */ 22f6220f1aSBin Meng }; 23f6220f1aSBin Meng 244b9f6a66SBin Meng struct mrc_region { 254b9f6a66SBin Meng u32 base; 264b9f6a66SBin Meng u32 offset; 274b9f6a66SBin Meng u32 length; 284b9f6a66SBin Meng }; 294b9f6a66SBin Meng 30f6220f1aSBin Meng struct udevice; 31f6220f1aSBin Meng 32f6220f1aSBin Meng /** 33f6220f1aSBin Meng * mrccache_find_current() - find the latest MRC cache record 34f6220f1aSBin Meng * 35f6220f1aSBin Meng * This searches the MRC cache region looking for the latest record to use 36f6220f1aSBin Meng * for setting up SDRAM 37f6220f1aSBin Meng * 38bfa95c53SBin Meng * @entry: Position and size of MRC cache in SPI flash 39f6220f1aSBin Meng * @return pointer to latest record, or NULL if none 40f6220f1aSBin Meng */ 414b9f6a66SBin Meng struct mrc_data_container *mrccache_find_current(struct mrc_region *entry); 42f6220f1aSBin Meng 43f6220f1aSBin Meng /** 44f6220f1aSBin Meng * mrccache_update() - update the MRC cache with a new record 45f6220f1aSBin Meng * 46bfa95c53SBin Meng * This writes a new record to the end of the MRC cache region. If the new 47bfa95c53SBin Meng * record is the same as the latest record then the write is skipped 48f6220f1aSBin Meng * 49f6220f1aSBin Meng * @sf: SPI flash to write to 50f6220f1aSBin Meng * @entry: Position and size of MRC cache in SPI flash 51f6220f1aSBin Meng * @cur: Record to write 52f6220f1aSBin Meng * @return 0 if updated, -EEXIST if the record is the same as the latest 532fe66dbcSBin Meng * record, -EINVAL if the record is not valid, other error if SPI write failed 54f6220f1aSBin Meng */ 554b9f6a66SBin Meng int mrccache_update(struct udevice *sf, struct mrc_region *entry, 56f6220f1aSBin Meng struct mrc_data_container *cur); 57f6220f1aSBin Meng 58ed800961SBin Meng /** 59ed800961SBin Meng * mrccache_reserve() - reserve MRC data on the stack 60ed800961SBin Meng * 61ed800961SBin Meng * This copies MRC data pointed by gd->arch.mrc_output to a new place on the 62ed800961SBin Meng * stack with length gd->arch.mrc_output_len, and updates gd->arch.mrc_output 63ed800961SBin Meng * to point to the new place once the migration is done. 64ed800961SBin Meng * 65ed800961SBin Meng * This routine should be called by reserve_arch() before U-Boot is relocated 66ed800961SBin Meng * when MRC cache is enabled. 67ed800961SBin Meng * 68ed800961SBin Meng * @return 0 always 69ed800961SBin Meng */ 70ed800961SBin Meng int mrccache_reserve(void); 71ed800961SBin Meng 72ed800961SBin Meng /** 73ed800961SBin Meng * mrccache_get_region() - get MRC region on the SPI flash 74ed800961SBin Meng * 75ed800961SBin Meng * This gets MRC region whose offset and size are described in the device tree 76ed800961SBin Meng * as a subnode to the SPI flash. If a non-NULL device pointer is supplied, 77ed800961SBin Meng * this also probes the SPI flash device and returns its device pointer for 78ed800961SBin Meng * the caller to use later. 79ed800961SBin Meng * 80ed800961SBin Meng * Be careful when calling this routine with a non-NULL device pointer: 81ed800961SBin Meng * - driver model initialization must be complete 82ed800961SBin Meng * - calling in the pre-relocation phase may bring some side effects during 83ed800961SBin Meng * the SPI flash device probe (eg: for SPI controllers on a PCI bus, it 84ed800961SBin Meng * triggers PCI bus enumeration during which insufficient memory issue 85ed800961SBin Meng * might be exposed and it causes subsequent SPI flash probe fails). 86ed800961SBin Meng * 87ed800961SBin Meng * @devp: Returns pointer to the SPI flash device 88ed800961SBin Meng * @entry: Position and size of MRC cache in SPI flash 89ed800961SBin Meng * @return 0 if success, -ENOENT if SPI flash node does not exist in the 90ed800961SBin Meng * device tree, -EPERM if MRC region subnode does not exist in the device 91ed800961SBin Meng * tree, -EINVAL if MRC region properties format is incorrect, other error 92ed800961SBin Meng * if SPI flash probe failed. 93ed800961SBin Meng */ 944b9f6a66SBin Meng int mrccache_get_region(struct udevice **devp, struct mrc_region *entry); 95ed800961SBin Meng 96ed800961SBin Meng /** 97ed800961SBin Meng * mrccache_save() - save MRC data to the SPI flash 98ed800961SBin Meng * 99ed800961SBin Meng * This saves MRC data stored previously by gd->arch.mrc_output to a proper 100ed800961SBin Meng * place within the MRC region on the SPI flash. 101ed800961SBin Meng * 102ed800961SBin Meng * @return 0 if saved to SPI flash successfully, other error if failed 103ed800961SBin Meng */ 104ed800961SBin Meng int mrccache_save(void); 105ed800961SBin Meng 106bfa95c53SBin Meng #endif /* _ASM_MRCCACHE_H */ 107